Commit 332146d2 authored by Kory Maincent (TI.com)'s avatar Kory Maincent (TI.com) Committed by Luca Ceresoli
Browse files

drm/tilcdc: Remove simulate_vesa_sync flag 



The tilcdc hardware does not generate VESA-compliant sync signals. It
aligns the vertical sync (VS) on the second edge of the horizontal sync
(HS) instead of the first edge. To compensate for this hardware
behavior, the driver applies a timing adjustment in mode_fixup().

Previously, this adjustment was conditional based on the simulate_vesa_sync
flag, which was only set when using external encoders. This appears
problematic because:

1. The timing adjustment seems needed for the hardware behavior regardless
   of whether an external encoder is used
2. The external encoder infrastructure is driver-specific and being
   removed due to design issues
3. Boards using tilcdc without bridges (e.g., am335x-evm, am335x-evmsk)
   may not be getting the necessary timing adjustments

Remove the simulate_vesa_sync flag and apply the VESA sync timing
adjustment unconditionally, ensuring consistent behavior across all
configurations. While it's unclear if the previous conditional behavior
was causing actual issues, the unconditional adjustment better reflects
the hardware's characteristics.

Reviewed-by: default avatarLuca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: default avatarKory Maincent (TI.com) <kory.maincent@bootlin.com>
Link: https://patch.msgid.link/20260123-feature_tilcdc-v5-3-5a44d2aa3f6f@bootlin.com


Signed-off-by: default avatarLuca Ceresoli <luca.ceresoli@bootlin.com>
parent bc3f1e36

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

+0 −16
Original line number Diff line number Diff line
@@ -47,9 +47,6 @@ struct tilcdc_crtc { 


	struct drm_framebuffer *next_fb;



	/* Only set if an external encoder is connected */

	bool simulate_vesa_sync;



	int sync_lost_count;

	bool frame_intact;

	struct work_struct recover_work;
@@ -642,11 +639,6 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc, 
		const struct drm_display_mode *mode,

		struct drm_display_mode *adjusted_mode)

{

	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);



	if (!tilcdc_crtc->simulate_vesa_sync)

		return true;



	/*

	 * tilcdc does not generate VESA-compliant sync but aligns

	 * VS on the second edge of HS instead of first edge.
@@ -866,14 +858,6 @@ void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, 
	tilcdc_crtc->info = info;

}



void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,

					bool simulate_vesa_sync)

{

	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);



	tilcdc_crtc->simulate_vesa_sync = simulate_vesa_sync;

}



void tilcdc_crtc_update_clk(struct drm_crtc *crtc)

{

	struct drm_device *dev = crtc->dev;

drivers/gpu/drm/tilcdc/tilcdc_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -160,8 +160,6 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); 
void tilcdc_crtc_update_clk(struct drm_crtc *crtc);

void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,

		const struct tilcdc_panel_info *info);

void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,

					bool simulate_vesa_sync);

void tilcdc_crtc_shutdown(struct drm_crtc *crtc);

void tilcdc_crtc_destroy(struct drm_crtc *crtc);

int tilcdc_crtc_update_fb(struct drm_crtc *crtc,

drivers/gpu/drm/tilcdc/tilcdc_external.c

+0 −1
Original line number Diff line number Diff line
@@ -80,7 +80,6 @@ int tilcdc_add_component_encoder(struct drm_device *ddev) 
		return -ENODEV;



	/* Only tda998x is supported at the moment. */

	tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true);

	tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x);



	return 0;