Commit 337b0a3d authored by Sung Joon Kim's avatar Sung Joon Kim Committed by Alex Deucher
Browse files

drm/amd/display: Update dcn351 debug flags and function pointers 



[why & how]
There are potential issues with Z8 and IPS
that need to be addressed and need to add
in missing function pointers.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarSung Joon Kim <sungjoon.kim@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ffda7081

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ static const struct hw_sequencer_funcs dcn351_funcs = { 
	.hw_block_power_up = dcn351_hw_block_power_up,

	.hw_block_power_down = dcn351_hw_block_power_down,

	.root_clock_control = dcn35_root_clock_control,

	.set_long_vtotal = dcn35_set_long_vblank,

};



static const struct hwseq_private_funcs dcn351_private_funcs = {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

+2 −2
Original line number Diff line number Diff line
@@ -744,7 +744,7 @@ static const struct dc_debug_options debug_defaults_drv = { 
	},

	.seamless_boot_odm_combine = DML_FAIL_SOURCE_PIXEL_FORMAT,

	.enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/

	.minimum_z8_residency_time = 2100,

	.minimum_z8_residency_time = 1,

	.using_dml2 = true,

	.support_eDP1_5 = true,

	.enable_hpo_pg_support = false,
@@ -763,7 +763,7 @@ static const struct dc_debug_options debug_defaults_drv = { 
	.psp_disabled_wa = true,

	.ips2_eval_delay_us = 2000,

	.ips2_entry_delay_us = 800,

	.disable_dmub_reallow_idle = true,

	.disable_dmub_reallow_idle = false,

	.static_screen_wait_frames = 2,

};