Commit 33bc8994 authored by TungYu Lu's avatar TungYu Lu Committed by Alex Deucher
Browse files

drm/amd/display: Correct prefetch calculation 



[Why]
The minimum value of the dst_y_prefetch_equ was not correct
in prefetch calculation whice causes OPTC underflow.

[How]
Add the min operation of dst_y_prefetch_equ in prefetch calculation
for legacy DML.

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: default avatarTungYu Lu <tungyu.lu@amd.com>
Signed-off-by: default avatarZaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: default avatarMark Broadworth <mark.broadworth@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 19e743f0

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

+1 −0
Original line number Diff line number Diff line
@@ -1002,6 +1002,7 @@ static bool CalculatePrefetchSchedule( 


	dst_y_prefetch_equ = VStartup - (Tsetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime

			- (*DSTYAfterScaler + *DSTXAfterScaler / myPipe->HTotal);

	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH



	Lsw_oto = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC);

	Tsw_oto = Lsw_oto * LineTime;

drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

+1 −0
Original line number Diff line number Diff line
@@ -1105,6 +1105,7 @@ static bool CalculatePrefetchSchedule( 
	Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;

	dst_y_prefetch_oto = Tvm_oto_lines + 2 * Tr0_oto_lines + Lsw_oto;

	dst_y_prefetch_equ =  VStartup - (*TSetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime - (*DSTYAfterScaler + *DSTXAfterScaler / myPipe->HTotal);

	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH

	dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;

	Tpre_rounded = dst_y_prefetch_equ * LineTime;

drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

+1 −0
Original line number Diff line number Diff line
@@ -1123,6 +1123,7 @@ static bool CalculatePrefetchSchedule( 
	Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;

	dst_y_prefetch_oto = Tvm_oto_lines + 2 * Tr0_oto_lines + Lsw_oto;

	dst_y_prefetch_equ =  VStartup - (*TSetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime - (*DSTYAfterScaler + *DSTXAfterScaler / myPipe->HTotal);

	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH

	dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;

	Tpre_rounded = dst_y_prefetch_equ * LineTime;