Commit 346492f3 authored by Sonny Jiang's avatar Sonny Jiang Committed by Alex Deucher
Browse files

drm/amdgpu: Add VCN_5_0_1 support 



Add vcn support for VCN_5_0_1

v2: rebase, squash in fixes (Alex)

Signed-off-by: default avatarSonny Jiang <sonjiang@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c406fca4

drivers/gpu/drm/amd/amdgpu/Makefile

+2 −1
Original line number Diff line number Diff line 
#

# Copyright 2017 Advanced Micro Devices, Inc.

# Copyright 2017-2024 Advanced Micro Devices, Inc. All rights reserved.

#

# Permission is hereby granted, free of charge, to any person obtaining a

# copy of this software and associated documentation files (the "Software"),
@@ -200,6 +200,7 @@ amdgpu-y += \ 
	vcn_v4_0_3.o \

	vcn_v4_0_5.o \

	vcn_v5_0_0.o \

	vcn_v5_0_1.o \

	amdgpu_jpeg.o \

	jpeg_v1_0.o \

	jpeg_v2_0.o \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+5 −2
Original line number Diff line number Diff line
@@ -1031,7 +1031,8 @@ int amdgpu_vcn_unified_ring_test_ib(struct amdgpu_ring *ring, long timeout) 
	struct amdgpu_device *adev = ring->adev;

	long r;



	if (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(4, 0, 3)) {

	if ((amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(4, 0, 3)) &&

	    (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(5, 0, 1))) {

		r = amdgpu_vcn_enc_ring_test_ib(ring, timeout);

		if (r)

			goto error;
@@ -1082,7 +1083,9 @@ void amdgpu_vcn_setup_ucode(struct amdgpu_device *adev) 
				ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);



			if (amdgpu_ip_version(adev, UVD_HWIP, 0) ==

			    IP_VERSION(4, 0, 3))

			    IP_VERSION(4, 0, 3) ||

			    amdgpu_ip_version(adev, UVD_HWIP, 0) ==

			    IP_VERSION(5, 0, 1))

				break;

		}

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

+12 −2
Original line number Diff line number Diff line 
/*

 * Copyright 2016 Advanced Micro Devices, Inc.

 * Copyright 2016-2024 Advanced Micro Devices, Inc. All rights reserved.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),
@@ -163,20 +163,30 @@ 
#define SOC24_DPG_MODE_OFFSET(ip, inst_idx, reg)						\

	({											\

		uint32_t internal_reg_offset, addr;						\

		bool video_range, aon_range;				\

		bool video_range, video1_range, aon_range, aon1_range;				\

												\

		addr = (adev->reg_offset[ip##_HWIP][inst_idx][reg##_BASE_IDX] + reg);		\

		addr <<= 2;									\

		video_range = ((((0xFFFFF & addr) >= (VCN_VID_SOC_ADDRESS)) &&			\

				((0xFFFFF & addr) < ((VCN_VID_SOC_ADDRESS + 0x2600)))));	\

		video1_range = ((((0xFFFFF & addr) >= (VCN1_VID_SOC_ADDRESS)) &&		\

				((0xFFFFF & addr) < ((VCN1_VID_SOC_ADDRESS + 0x2600)))));	\

		aon_range   = ((((0xFFFFF & addr) >= (VCN_AON_SOC_ADDRESS)) &&			\

				((0xFFFFF & addr) < ((VCN_AON_SOC_ADDRESS + 0x600)))));		\

		aon1_range   = ((((0xFFFFF & addr) >= (VCN1_AON_SOC_ADDRESS)) &&		\

				((0xFFFFF & addr) < ((VCN1_AON_SOC_ADDRESS + 0x600)))));	\

		if (video_range)								\

			internal_reg_offset = ((0xFFFFF & addr) - (VCN_VID_SOC_ADDRESS) +	\

				(VCN_VID_IP_ADDRESS));						\

		else if (aon_range)								\

			internal_reg_offset = ((0xFFFFF & addr) - (VCN_AON_SOC_ADDRESS) +	\

				(VCN_AON_IP_ADDRESS));						\

		else if (video1_range)								\

			internal_reg_offset = ((0xFFFFF & addr) - (VCN1_VID_SOC_ADDRESS) +	\

				(VCN_VID_IP_ADDRESS));						\

		else if (aon1_range)								\

			internal_reg_offset = ((0xFFFFF & addr) - (VCN1_AON_SOC_ADDRESS) +	\

				(VCN_AON_IP_ADDRESS));						\

		else										\

			internal_reg_offset = (0xFFFFF & addr);					\

												\

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

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+1105 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.h

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2024 Advanced Micro Devices, Inc. All rights reserved.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */



#ifndef __VCN_v5_0_1_H__

#define __VCN_v5_0_1_H__



#define VCN_VID_SOC_ADDRESS                        0x1FC00

#define VCN_AON_SOC_ADDRESS                        0x1F800

#define VCN1_VID_SOC_ADDRESS                       0x48300

#define VCN1_AON_SOC_ADDRESS                       0x48000



#define VCN_VID_IP_ADDRESS                         0x0

#define VCN_AON_IP_ADDRESS                         0x30000



extern const struct amdgpu_ip_block_version vcn_v5_0_1_ip_block;



#endif /* __VCN_v5_0_1_H__ */