Commit 3539437f authored by Rafal Ostrowski's avatar Rafal Ostrowski Committed by Alex Deucher
Browse files

drm/amd/display: Move FPU Guards From DML To DC - Part 1 



[Why]
FPU guards (DC_FP_START/DC_FP_END) are required to wrap around code that
can manipulates floats. To do this properly, the FPU guards must be used
in a file that is not compiled as a FPU unit. If the guards are used in
a file that is a FPU unit, other sections in the file that aren't guarded
may be end up being compiled to use FPU operations.

[How]
Added DC_FP_START and DC_FP_END to DC functions that call DML functions
using FPU.

Reviewed-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarRafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 02c3060e

drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c

+22 −3
Original line number Diff line number Diff line
@@ -53,11 +53,30 @@ inline void dc_assert_fp_enabled(void) 
{

	int depth;



	depth = __this_cpu_read(fpu_recursion_depth);

	depth = this_cpu_read(fpu_recursion_depth);



	ASSERT(depth >= 1);

}



/**

 * dc_assert_fp_enabled - Check if FPU protection is enabled

 *

 * This function tells if the code is already under FPU protection or not. A

 * function that works as an API for a set of FPU operations can use this

 * function for checking if the caller invoked it after DC_FP_START(). For

 * example, take a look at dcn20_fpu.c file.

 *

 * Similar to dc_assert_fp_enabled, but does not assert, returns status instead.

 */

inline bool dc_is_fp_enabled(void)

{

	int depth;



	depth = this_cpu_read(fpu_recursion_depth);



	return (depth >= 1);

}



/**

 * dc_fpu_begin - Enables FPU protection

 * @function_name: A string containing the function name for debug purposes
@@ -77,7 +96,7 @@ void dc_fpu_begin(const char *function_name, const int line) 


	WARN_ON_ONCE(!in_task());

	preempt_disable();

	depth = __this_cpu_inc_return(fpu_recursion_depth);

	depth = this_cpu_inc_return(fpu_recursion_depth);

	if (depth == 1) {

		BUG_ON(!kernel_fpu_available());

		kernel_fpu_begin();
@@ -100,7 +119,7 @@ void dc_fpu_end(const char *function_name, const int line) 
{

	int depth;



	depth = __this_cpu_dec_return(fpu_recursion_depth);

	depth = this_cpu_dec_return(fpu_recursion_depth);

	if (depth == 0) {

		kernel_fpu_end();

	} else {

drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.h

+16 −1
Original line number Diff line number Diff line
@@ -28,15 +28,30 @@ 
#define __DC_FPU_H__



void dc_assert_fp_enabled(void);

bool dc_is_fp_enabled(void);

void dc_fpu_begin(const char *function_name, const int line);

void dc_fpu_end(const char *function_name, const int line);



#ifndef _LINUX_FPU_COMPILATION_UNIT

#define DC_FP_START()	dc_fpu_begin(__func__, __LINE__)

#define DC_FP_END()	dc_fpu_end(__func__, __LINE__)

#ifdef CONFIG_DRM_AMD_DC_FP

#define DC_RUN_WITH_PREEMPTION_ENABLED(code) \

	do { \

		bool dc_fp_enabled = dc_is_fp_enabled(); \

		if (dc_fp_enabled) \

			DC_FP_END(); \

		code; \

		if (dc_fp_enabled) \

			DC_FP_START(); \

	} while (0)

#else

#define DC_RUN_WITH_PREEMPTION_ENABLED(code) code

#endif // !CONFIG_DRM_AMD_DC_FP

#else

#define DC_FP_START()	BUILD_BUG()

#define DC_FP_END()	BUILD_BUG()

#endif

#define DC_RUN_WITH_PREEMPTION_ENABLED(code) code

#endif // !_LINUX_FPU_COMPILATION_UNIT



#endif /* __DC_FPU_H__ */

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

+0 −2
Original line number Diff line number Diff line
@@ -421,10 +421,8 @@ static void dcn3_get_memclk_states_from_smu(struct clk_mgr *clk_mgr_base) 
	clk_mgr_base->bw_params->dc_mode_softmax_memclk = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_UCLK);



	/* Refresh bounding box */

	DC_FP_START();

	clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(

			clk_mgr->base.ctx->dc, clk_mgr_base->bw_params);

	DC_FP_END();

}



static bool dcn3_is_smu_present(struct clk_mgr *clk_mgr_base)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

+0 −2
Original line number Diff line number Diff line
@@ -1059,11 +1059,9 @@ static void dcn32_get_memclk_states_from_smu(struct clk_mgr *clk_mgr_base) 
	if (!clk_mgr->dpm_present)

		dcn32_patch_dpm_table(clk_mgr_base->bw_params);



	DC_FP_START();

	/* Refresh bounding box */

	clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(

			clk_mgr->base.ctx->dc, clk_mgr_base->bw_params);

	DC_FP_END();

}



static bool dcn32_are_clock_states_equal(struct dc_clocks *a,

drivers/gpu/drm/amd/display/dc/core/dc.c

+1 −4
Original line number Diff line number Diff line
@@ -1096,11 +1096,8 @@ static bool dc_construct(struct dc *dc, 
#ifdef CONFIG_DRM_AMD_DC_FP

	dc->clk_mgr->force_smu_not_present = init_params->force_smu_not_present;



	if (dc->res_pool->funcs->update_bw_bounding_box) {

		DC_FP_START();

	if (dc->res_pool->funcs->update_bw_bounding_box)

		dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);

		DC_FP_END();

	}

	dc->soc_and_ip_translator = dc_create_soc_and_ip_translator(dc_ctx->dce_version);

	if (!dc->soc_and_ip_translator)

		goto fail;