Commit 3578fd47 authored by Florian Fainelli's avatar Florian Fainelli Committed by Marc Zyngier
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irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS 



Only MIPS based platforms using this interrupt controller as first level
interrupt controller can actually change the affinity of interrupts by
re-programming the affinity mask of the interrupt controller and use
another word group to have another CPU process the interrupt.

When this interrupt is used as a second level interrupt controller on
ARM/ARM64 there is no way to change the interrupt affinity. This fixes a
NULL pointer de-reference while trying to change the affinity since
there is only a single word group in that case, and we would have been
overruning the intc->cpus[] array.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211020184859.2705451-6-f.fainelli@gmail.com
parent 35eb2ef5

drivers/irqchip/irq-bcm7038-l1.c

+4 −0
Original line number Diff line number Diff line
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d) 
	raw_spin_unlock_irqrestore(&intc->lock, flags);

}



#if defined(CONFIG_MIPS) && defined(CONFIG_SMP)

static int bcm7038_l1_set_affinity(struct irq_data *d,

				   const struct cpumask *dest,

				   bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d, 


	return 0;

}

#endif



static int __init bcm7038_l1_init_one(struct device_node *dn,

				      unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = { 
	.name			= "bcm7038-l1",

	.irq_mask		= bcm7038_l1_mask,

	.irq_unmask		= bcm7038_l1_unmask,

#if defined(CONFIG_SMP) && defined(CONFIG_MIPS)

	.irq_set_affinity	= bcm7038_l1_set_affinity,

#endif

#ifdef CONFIG_PM_SLEEP

	.irq_set_wake		= bcm7038_l1_set_wake,

#endif