Commit 35c2c398 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

Merge in late fixes in preparation for the net-next PR.

Conflicts:

include/net/sch_generic.h
  a6bd339d ("net_sched: fix skb memory leak in deferred qdisc drops")
  ff2998f2 ("net: sched: introduce qdisc-specific drop reason tracing")
https://lore.kernel.org/adz0iX85FHMz0HdO@sirena.org.uk



drivers/net/ethernet/airoha/airoha_eth.c
  1acdfbdb ("net: airoha: Fix VIP configuration for AN7583 SoC")
  bf3471e6 ("net: airoha: Make flow control source port mapping dependent on nbq parameter")

Adjacent changes:

drivers/net/ethernet/airoha/airoha_ppe.c
  f44218cd ("net: airoha: Reset PPE cpu port configuration in airoha_ppe_hw_init()")
  7da62262 ("inet: add ip_local_port_step_width sysctl to improve port usage distribution")

Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 6bb6bafa b9d8b856

CREDITS

+10 −0
Original line number Diff line number Diff line
@@ -3592,6 +3592,16 @@ E: wsalamon@tislabs.com 
E: wsalamon@nai.com

D: portions of the Linux Security Module (LSM) framework and security modules



N: Salil Mehta

E: salil.mehta@opnsrc.net

D: Co-authored Huawei/HiSilicon Kunpeng 920 SoC HNS3 PF and VF 100G

D: Ethernet driver

D: Co-authored Huawei/HiSilicon Kunpeng 916 SoC HNS 10G Ethernet

D: driver enhancements

D: Maintained Huawei/HiSilicon HNS and HNS3 10G/100G Ethernet drivers

D: for Kunpeng 916 family, 920 family of SoCs

S: Cambridge, Cambridgeshire, United Kingdom



N: Robert Sanders

E: gt8134b@prism.gatech.edu

D: Dosemu

MAINTAINERS

+0 −2
Original line number Diff line number Diff line
@@ -11534,7 +11534,6 @@ F: drivers/bus/hisi_lpc.c 








HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)









M:	Jian Shen <shenjian15@huawei.com>









M:	Salil Mehta <salil.mehta@huawei.com>









M:	Jijie Shao <shaojijie@huawei.com>









L:	netdev@vger.kernel.org









S:	Maintained








@@ -11549,7 +11548,6 @@ F:	drivers/net/ethernet/hisilicon/hibmcge/















HISILICON NETWORK SUBSYSTEM DRIVER









M:	Jian Shen <shenjian15@huawei.com>









M:	Salil Mehta <salil.mehta@huawei.com>









L:	netdev@vger.kernel.org









S:	Maintained









W:	http://www.hisilicon.com
































drivers/net/can/usb/ucan.c



+1
−1






























Original line number
Diff line number
Diff line







@@ -1379,7 +1379,7 @@ static int ucan_probe(struct usb_interface *intf,







	 */



















	/* Prepare Memory for control transfers */









	ctl_msg_buffer = devm_kzalloc(&udev->dev,









	ctl_msg_buffer = devm_kzalloc(&intf->dev,









				      sizeof(union ucan_ctl_payload),









				      GFP_KERNEL);









	if (!ctl_msg_buffer) {
































drivers/net/ethernet/airoha/airoha_eth.c



+70
−27






























Original line number
Diff line number
Diff line







@@ -107,19 +107,7 @@ static int airoha_set_vip_for_gdm_port(struct airoha_gdm_port *port,







	struct airoha_eth *eth = port->qdma->eth;









	u32 vip_port;



















	switch (port->id) {









	case AIROHA_GDM3_IDX:









		/* FIXME: handle XSI_PCIE1_PORT */









		vip_port = XSI_PCIE0_VIP_PORT_MASK;









		break;









	case AIROHA_GDM4_IDX:









		/* FIXME: handle XSI_USB_PORT */









		vip_port = XSI_ETH_VIP_PORT_MASK;









		break;









	default:









		return 0;









	}



















	vip_port = eth->soc->ops.get_vip_port(port, port->nbq);









	if (enable) {









		airoha_fe_set(eth, REG_FE_VIP_PORT_EN, vip_port);









		airoha_fe_set(eth, REG_FE_IFC_PORT_EN, vip_port);








@@ -293,16 +281,18 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth)







		[FE_PSE_PORT_GDM4] = 2,









		[FE_PSE_PORT_CDM5] = 2,









	};









	u32 all_rsv;









	int q;



















	all_rsv = airoha_fe_get_pse_all_rsv(eth);









	if (airoha_ppe_is_enabled(eth, 1)) {









		u32 all_rsv;



















		/* hw misses PPE2 oq rsv */









		all_rsv = airoha_fe_get_pse_all_rsv(eth);









		all_rsv += PSE_RSV_PAGES *









			   pse_port_num_queues[FE_PSE_PORT_PPE2];









		airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK,









			      FIELD_PREP(PSE_ALLRSV_MASK, all_rsv));









	}









	airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);



















	/* CMD1 */









	for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)








@@ -584,7 +574,7 @@ static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)







static int airoha_qdma_get_gdm_port(struct airoha_eth *eth,









				    struct airoha_qdma_desc *desc)









{









	u32 port, sport, msg1 = le32_to_cpu(desc->msg1);









	u32 port, sport, msg1 = le32_to_cpu(READ_ONCE(desc->msg1));



















	sport = FIELD_GET(QDMA_ETH_RXMSG_SPORT_MASK, msg1);









	switch (sport) {








@@ -612,21 +602,24 @@ static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)







	while (done < budget) {









		struct airoha_queue_entry *e = &q->entry[q->tail];









		struct airoha_qdma_desc *desc = &q->desc[q->tail];









		u32 hash, reason, msg1 = le32_to_cpu(desc->msg1);









		struct page *page = virt_to_head_page(e->buf);









		u32 desc_ctrl = le32_to_cpu(desc->ctrl);









		u32 hash, reason, msg1, desc_ctrl;









		struct airoha_gdm_port *port;









		int data_len, len, p;









		struct page *page;



















		desc_ctrl = le32_to_cpu(READ_ONCE(desc->ctrl));









		if (!(desc_ctrl & QDMA_DESC_DONE_MASK))









			break;



















		dma_rmb();



















		q->tail = (q->tail + 1) % q->ndesc;









		q->queued--;



















		dma_sync_single_for_cpu(eth->dev, e->dma_addr,









					SKB_WITH_OVERHEAD(q->buf_size), dir);



















		page = virt_to_head_page(e->buf);









		len = FIELD_GET(QDMA_DESC_LEN_MASK, desc_ctrl);









		data_len = q->skb ? q->buf_size









				  : SKB_WITH_OVERHEAD(q->buf_size);








@@ -670,8 +663,8 @@ static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)







			 * DMA descriptor. Report DSA tag to the DSA stack









			 * via skb dst info.









			 */









			u32 sptag = FIELD_GET(QDMA_ETH_RXMSG_SPTAG,









					      le32_to_cpu(desc->msg0));









			u32 msg0 = le32_to_cpu(READ_ONCE(desc->msg0));









			u32 sptag = FIELD_GET(QDMA_ETH_RXMSG_SPTAG, msg0);



















			if (sptag < ARRAY_SIZE(port->dsa_meta) &&









			    port->dsa_meta[sptag])








@@ -679,6 +672,7 @@ static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)







						  &port->dsa_meta[sptag]->dst);









		}



















		msg1 = le32_to_cpu(READ_ONCE(desc->msg1));









		hash = FIELD_GET(AIROHA_RXD4_FOE_ENTRY, msg1);









		if (hash != AIROHA_RXD4_FOE_ENTRY)









			skb_set_hash(q->skb, jhash_1word(hash, 0),








@@ -819,6 +813,11 @@ static void airoha_qdma_cleanup_rx_queue(struct airoha_queue *q)







	}



















	q->head = q->tail;









	/* Set RX_DMA_IDX to RX_CPU_IDX to notify the hw the QDMA RX ring is









	 * empty.









	 */









	airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid), RX_RING_CPU_IDX_MASK,









			FIELD_PREP(RX_RING_CPU_IDX_MASK, q->head));









	airoha_qdma_rmw(qdma, REG_RX_DMA_IDX(qid), RX_RING_DMA_IDX_MASK,









			FIELD_PREP(RX_RING_DMA_IDX_MASK, q->tail));









}








@@ -1727,7 +1726,7 @@ static int airoha_dev_set_macaddr(struct net_device *dev, void *p)







static int airoha_set_gdm2_loopback(struct airoha_gdm_port *port)









{









	struct airoha_eth *eth = port->qdma->eth;









	u32 val, pse_port, chan, nbq;









	u32 val, pse_port, chan;









	int src_port;



















	/* Forward the traffic to the proper GDM port */








@@ -1757,9 +1756,7 @@ static int airoha_set_gdm2_loopback(struct airoha_gdm_port *port)







	airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(AIROHA_GDM2_IDX));









	airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(AIROHA_GDM2_IDX));



















	/* XXX: handle XSI_USB_PORT and XSI_PCE1_PORT */









	nbq = port->id == AIROHA_GDM3_IDX && airoha_is_7581(eth) ? 4 : 0;









	src_port = eth->soc->ops.get_src_port_id(port, nbq);









	src_port = eth->soc->ops.get_src_port_id(port, port->nbq);









	if (src_port < 0)









		return src_port;


















@@ -1773,7 +1770,7 @@ static int airoha_set_gdm2_loopback(struct airoha_gdm_port *port)







		      __field_prep(SP_CPORT_MASK(val), FE_PSE_PORT_CDM2));



















	if (port->id == AIROHA_GDM4_IDX && airoha_is_7581(eth)) {









		u32 mask = FC_ID_OF_SRC_PORT_MASK(nbq);









		u32 mask = FC_ID_OF_SRC_PORT_MASK(port->nbq);



















		airoha_fe_rmw(eth, REG_SRC_PORT_FC_MAP6, mask,









			      __field_prep(mask, AIROHA_GDM2_IDX));








@@ -2952,6 +2949,8 @@ static int airoha_alloc_gdm_port(struct airoha_eth *eth,







	port->eth = eth;









	port->dev = dev;









	port->id = id;









	/* XXX: Read nbq from DTS */









	port->nbq = id == AIROHA_GDM3_IDX && airoha_is_7581(eth) ? 4 : 0;









	eth->ports[p] = port;



















	return airoha_metadata_dst_alloc(port);








@@ -3148,6 +3147,28 @@ static int airoha_en7581_get_src_port_id(struct airoha_gdm_port *port, int nbq)







	return -EINVAL;









}



















static u32 airoha_en7581_get_vip_port(struct airoha_gdm_port *port, int nbq)









{









	switch (port->id) {









	case AIROHA_GDM3_IDX:









		if (nbq == 4)









			return XSI_PCIE0_VIP_PORT_MASK;









		if (nbq == 5)









			return XSI_PCIE1_VIP_PORT_MASK;









		break;









	case AIROHA_GDM4_IDX:









		if (!nbq)









			return XSI_ETH_VIP_PORT_MASK;









		if (nbq == 1)









			return XSI_USB_VIP_PORT_MASK;









		break;









	default:









		break;









	}



















	return 0;









}



















static const char * const an7583_xsi_rsts_names[] = {









	"xsi-mac",









	"hsi0-mac",








@@ -3177,6 +3198,26 @@ static int airoha_an7583_get_src_port_id(struct airoha_gdm_port *port, int nbq)







	return -EINVAL;









}



















static u32 airoha_an7583_get_vip_port(struct airoha_gdm_port *port, int nbq)









{









	switch (port->id) {









	case AIROHA_GDM3_IDX:









		if (!nbq)









			return XSI_ETH_VIP_PORT_MASK;









		break;









	case AIROHA_GDM4_IDX:









		if (!nbq)









			return XSI_PCIE0_VIP_PORT_MASK;









		if (nbq == 1)









			return XSI_USB_VIP_PORT_MASK;









		break;









	default:









		break;









	}



















	return 0;









}



















static const struct airoha_eth_soc_data en7581_soc_data = {









	.version = 0x7581,









	.xsi_rsts_names = en7581_xsi_rsts_names,








@@ -3184,6 +3225,7 @@ static const struct airoha_eth_soc_data en7581_soc_data = {







	.num_ppe = 2,









	.ops = {









		.get_src_port_id = airoha_en7581_get_src_port_id,









		.get_vip_port = airoha_en7581_get_vip_port,









	},









};


















@@ -3194,6 +3236,7 @@ static const struct airoha_eth_soc_data an7583_soc_data = {







	.num_ppe = 1,









	.ops = {









		.get_src_port_id = airoha_an7583_get_src_port_id,









		.get_vip_port = airoha_an7583_get_vip_port,









	},









};










































drivers/net/ethernet/airoha/airoha_eth.h



+2
−0






























Original line number
Diff line number
Diff line







@@ -537,6 +537,7 @@ struct airoha_gdm_port {







	struct airoha_eth *eth;









	struct net_device *dev;









	int id;









	int nbq;



















	struct airoha_hw_stats stats;


















@@ -577,6 +578,7 @@ struct airoha_eth_soc_data {







	int num_ppe;









	struct {









		int (*get_src_port_id)(struct airoha_gdm_port *port, int nbq);









		u32 (*get_vip_port)(struct airoha_gdm_port *port, int nbq);









	} ops;









};