Loading Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml 0 → 100644 +117 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/power/mediatek,mt8196-gpufreq.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek MFlexGraphics Power and Frequency Controller maintainers: - Nicolas Frattaroli <nicolas.frattaroli@collabora.com> description: A special-purpose embedded MCU to control power and frequency of GPU devices using MediaTek Flexible Graphics integration hardware. properties: $nodename: pattern: '^power-controller@[a-f0-9]+$' compatible: enum: - mediatek,mt8196-gpufreq reg: items: - description: GPR memory area - description: RPC memory area - description: SoC variant ID register reg-names: items: - const: gpr - const: rpc - const: hw-revision clocks: items: - description: main clock of the embedded controller (EB) - description: core PLL - description: stack 0 PLL - description: stack 1 PLL clock-names: items: - const: eb - const: core - const: stack0 - const: stack1 mboxes: items: - description: FastDVFS events - description: frequency control - description: sleep control - description: timer control - description: frequency hopping control - description: hardware voter control - description: FastDVFS control mbox-names: items: - const: fast-dvfs-event - const: gpufreq - const: sleep - const: timer - const: fhctl - const: ccf - const: fast-dvfs memory-region: items: - description: phandle to the GPUEB shared memory "#clock-cells": const: 1 "#power-domain-cells": const: 0 required: - compatible - reg - reg-names - clocks - clock-names - mboxes - mbox-names - memory-region - "#clock-cells" - "#power-domain-cells" additionalProperties: false examples: - | #include <dt-bindings/clock/mediatek,mt8196-clock.h> power-controller@4b09fd00 { compatible = "mediatek,mt8196-gpufreq"; reg = <0x4b09fd00 0x80>, <0x4b800000 0x1000>, <0x4b860128 0x4>; reg-names = "gpr", "rpc", "hw-revision"; clocks = <&topckgen CLK_TOP_MFG_EB>, <&mfgpll CLK_MFG_AO_MFGPLL>, <&mfgpll_sc0 CLK_MFGSC0_AO_MFGPLL_SC0>, <&mfgpll_sc1 CLK_MFGSC1_AO_MFGPLL_SC1>; clock-names = "eb", "core", "stack0", "stack1"; mboxes = <&gpueb_mbox 0>, <&gpueb_mbox 1>, <&gpueb_mbox 2>, <&gpueb_mbox 3>, <&gpueb_mbox 4>, <&gpueb_mbox 5>, <&gpueb_mbox 7>; mbox-names = "fast-dvfs-event", "gpufreq", "sleep", "timer", "fhctl", "ccf", "fast-dvfs"; memory-region = <&gpueb_shared_memory>; #clock-cells = <1>; #power-domain-cells = <0>; }; Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +4 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,9 @@ properties: - mediatek,mt8188-power-controller - mediatek,mt8192-power-controller - mediatek,mt8195-power-controller - mediatek,mt8196-hwv-hfrp-power-controller - mediatek,mt8196-hwv-scp-power-controller - mediatek,mt8196-power-controller - mediatek,mt8365-power-controller '#power-domain-cells': Loading Loading @@ -157,6 +160,7 @@ allOf: contains: enum: - mediatek,mt8183-power-controller - mediatek,mt8196-power-controller then: properties: access-controllers: Loading Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,glymur-rpmhpd - qcom,kaanapali-rpmhpd - qcom,mdm9607-rpmpd - qcom,milos-rpmhpd - qcom,msm8226-rpmpd Loading Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +2 −0 Original line number Diff line number Diff line Loading @@ -46,6 +46,7 @@ properties: - rockchip,rk3576-power-controller - rockchip,rk3588-power-controller - rockchip,rv1126-power-controller - rockchip,rv1126b-power-controller "#power-domain-cells": const: 1 Loading Loading @@ -126,6 +127,7 @@ $defs: "include/dt-bindings/power/rk3568-power.h" "include/dt-bindings/power/rk3588-power.h" "include/dt-bindings/power/rockchip,rv1126-power.h" "include/dt-bindings/power/rockchip,rv1126b-power-controller.h" clocks: minItems: 1 Loading Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml +32 −6 Original line number Diff line number Diff line Loading @@ -13,23 +13,21 @@ description: | maintainers: - Nicolas Saenz Julienne <nsaenz@kernel.org> allOf: - $ref: /schemas/watchdog/watchdog.yaml# properties: compatible: items: - enum: - brcm,bcm2835-pm - brcm,bcm2711-pm - brcm,bcm2712-pm - const: brcm,bcm2835-pm-wdt reg: minItems: 2 minItems: 1 maxItems: 3 reg-names: minItems: 2 minItems: 1 items: - const: pm - const: asb Loading Loading @@ -62,8 +60,36 @@ required: - reg - "#power-domain-cells" - "#reset-cells" allOf: - $ref: /schemas/watchdog/watchdog.yaml# - if: properties: compatible: contains: enum: - brcm,bcm2835-pm - brcm,bcm2711-pm then: required: - clocks properties: reg: minItems: 2 reg-names: minItems: 2 else: properties: reg: maxItems: 1 reg-names: maxItems: 1 additionalProperties: false examples: Loading Loading
Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml 0 → 100644 +117 −0 Original line number Diff line number Diff line # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/power/mediatek,mt8196-gpufreq.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek MFlexGraphics Power and Frequency Controller maintainers: - Nicolas Frattaroli <nicolas.frattaroli@collabora.com> description: A special-purpose embedded MCU to control power and frequency of GPU devices using MediaTek Flexible Graphics integration hardware. properties: $nodename: pattern: '^power-controller@[a-f0-9]+$' compatible: enum: - mediatek,mt8196-gpufreq reg: items: - description: GPR memory area - description: RPC memory area - description: SoC variant ID register reg-names: items: - const: gpr - const: rpc - const: hw-revision clocks: items: - description: main clock of the embedded controller (EB) - description: core PLL - description: stack 0 PLL - description: stack 1 PLL clock-names: items: - const: eb - const: core - const: stack0 - const: stack1 mboxes: items: - description: FastDVFS events - description: frequency control - description: sleep control - description: timer control - description: frequency hopping control - description: hardware voter control - description: FastDVFS control mbox-names: items: - const: fast-dvfs-event - const: gpufreq - const: sleep - const: timer - const: fhctl - const: ccf - const: fast-dvfs memory-region: items: - description: phandle to the GPUEB shared memory "#clock-cells": const: 1 "#power-domain-cells": const: 0 required: - compatible - reg - reg-names - clocks - clock-names - mboxes - mbox-names - memory-region - "#clock-cells" - "#power-domain-cells" additionalProperties: false examples: - | #include <dt-bindings/clock/mediatek,mt8196-clock.h> power-controller@4b09fd00 { compatible = "mediatek,mt8196-gpufreq"; reg = <0x4b09fd00 0x80>, <0x4b800000 0x1000>, <0x4b860128 0x4>; reg-names = "gpr", "rpc", "hw-revision"; clocks = <&topckgen CLK_TOP_MFG_EB>, <&mfgpll CLK_MFG_AO_MFGPLL>, <&mfgpll_sc0 CLK_MFGSC0_AO_MFGPLL_SC0>, <&mfgpll_sc1 CLK_MFGSC1_AO_MFGPLL_SC1>; clock-names = "eb", "core", "stack0", "stack1"; mboxes = <&gpueb_mbox 0>, <&gpueb_mbox 1>, <&gpueb_mbox 2>, <&gpueb_mbox 3>, <&gpueb_mbox 4>, <&gpueb_mbox 5>, <&gpueb_mbox 7>; mbox-names = "fast-dvfs-event", "gpufreq", "sleep", "timer", "fhctl", "ccf", "fast-dvfs"; memory-region = <&gpueb_shared_memory>; #clock-cells = <1>; #power-domain-cells = <0>; };
Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +4 −0 Original line number Diff line number Diff line Loading @@ -33,6 +33,9 @@ properties: - mediatek,mt8188-power-controller - mediatek,mt8192-power-controller - mediatek,mt8195-power-controller - mediatek,mt8196-hwv-hfrp-power-controller - mediatek,mt8196-hwv-scp-power-controller - mediatek,mt8196-power-controller - mediatek,mt8365-power-controller '#power-domain-cells': Loading Loading @@ -157,6 +160,7 @@ allOf: contains: enum: - mediatek,mt8183-power-controller - mediatek,mt8196-power-controller then: properties: access-controllers: Loading
Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +1 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,glymur-rpmhpd - qcom,kaanapali-rpmhpd - qcom,mdm9607-rpmpd - qcom,milos-rpmhpd - qcom,msm8226-rpmpd Loading
Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +2 −0 Original line number Diff line number Diff line Loading @@ -46,6 +46,7 @@ properties: - rockchip,rk3576-power-controller - rockchip,rk3588-power-controller - rockchip,rv1126-power-controller - rockchip,rv1126b-power-controller "#power-domain-cells": const: 1 Loading Loading @@ -126,6 +127,7 @@ $defs: "include/dt-bindings/power/rk3568-power.h" "include/dt-bindings/power/rk3588-power.h" "include/dt-bindings/power/rockchip,rv1126-power.h" "include/dt-bindings/power/rockchip,rv1126b-power-controller.h" clocks: minItems: 1 Loading
Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml +32 −6 Original line number Diff line number Diff line Loading @@ -13,23 +13,21 @@ description: | maintainers: - Nicolas Saenz Julienne <nsaenz@kernel.org> allOf: - $ref: /schemas/watchdog/watchdog.yaml# properties: compatible: items: - enum: - brcm,bcm2835-pm - brcm,bcm2711-pm - brcm,bcm2712-pm - const: brcm,bcm2835-pm-wdt reg: minItems: 2 minItems: 1 maxItems: 3 reg-names: minItems: 2 minItems: 1 items: - const: pm - const: asb Loading Loading @@ -62,8 +60,36 @@ required: - reg - "#power-domain-cells" - "#reset-cells" allOf: - $ref: /schemas/watchdog/watchdog.yaml# - if: properties: compatible: contains: enum: - brcm,bcm2835-pm - brcm,bcm2711-pm then: required: - clocks properties: reg: minItems: 2 reg-names: minItems: 2 else: properties: reg: maxItems: 1 reg-names: maxItems: 1 additionalProperties: false examples: Loading