Unverified Commit 35e7a72a authored by Lucas Stach's avatar Lucas Stach Committed by Robert Foss
Browse files

drm/bridge: analogix_dp: don't adjust further when clock recovery succeeded 



Take a early return from the clock recovery training when the sink reports
CR_DONE for all lanes. There is no point in trying to adjust the link
parameters further.

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarRobert Foss <rfoss@kernel.org>
Signed-off-by: default avatarRobert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240318203925.2837689-3-l.stach@pengutronix.de
parent 3747c981

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

+26 −29
Original line number Diff line number Diff line
@@ -410,11 +410,6 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) 
	if (retval < 0)

		return retval;



	retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1,

				  adjust_request, 2);

	if (retval < 0)

		return retval;



	if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) {

		/* set training pattern 2 for EQ */

		analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
@@ -427,19 +422,22 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) 


		dev_dbg(dp->dev, "Link Training Clock Recovery success\n");

		dp->link_train.lt_state = EQUALIZER_TRAINING;

	} else {



		return 0;

	}



	retval = drm_dp_dpcd_read(&dp->aux, DP_ADJUST_REQUEST_LANE0_1,

				  adjust_request, 2);

	if (retval < 0)

		return retval;



	for (lane = 0; lane < lane_count; lane++) {

			training_lane = analogix_dp_get_lane_link_training(

							dp, lane);

			voltage_swing = analogix_dp_get_adjust_request_voltage(

							adjust_request, lane);

			pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(

							adjust_request, lane);

		training_lane = analogix_dp_get_lane_link_training(dp, lane);

		voltage_swing = analogix_dp_get_adjust_request_voltage(adjust_request, lane);

		pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(adjust_request, lane);



			if (DPCD_VOLTAGE_SWING_GET(training_lane) ==

					voltage_swing &&

			    DPCD_PRE_EMPHASIS_GET(training_lane) ==

					pre_emphasis)

		if (DPCD_VOLTAGE_SWING_GET(training_lane) == voltage_swing &&

		    DPCD_PRE_EMPHASIS_GET(training_lane) == pre_emphasis)

			dp->link_train.cr_loop[lane]++;



		if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
@@ -452,7 +450,6 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) 
			return -EIO;

		}

	}

	}



	analogix_dp_get_adjust_training_lane(dp, adjust_request);

	analogix_dp_set_lane_link_training(dp);