Unverified Commit 36052e56 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Rodrigo Vivi
Browse files

drm/xe: Use write-combine mapping when populating DPT 



The fallback case for DPT backing store is a buffer object in system
memory buffer, which by default use a write-back CPU caching policy.

If this fallback gets triggered, and since there is currently no flushing,
the DPT writes made when pinning a buffer to display are not guaranteed to
be seen by the display engine.

To fix this, since both the local memory and the stolen memory DPT
placements already use write-combine, let us make the system memory option
follow suit by passing down the appropriate flag.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@igalia.com>
Suggested-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260324084018.20353-3-tvrtko.ursulin@igalia.com


Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 2bb026f3

drivers/gpu/drm/xe/display/xe_fb_pin.c

+2 −1
Original line number Diff line number Diff line
@@ -122,7 +122,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb, 
						   ttm_bo_type_kernel,

						   XE_BO_FLAG_SYSTEM |

						   XE_BO_FLAG_GGTT |

						   XE_BO_FLAG_PAGETABLE,

						   XE_BO_FLAG_PAGETABLE |

						   XE_BO_FLAG_FORCE_WC,

						   alignment, false);

	if (IS_ERR(dpt))

		return PTR_ERR(dpt);