Commit 368736db authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
Browse files

Merge remote-tracking branches 'ras/edac-drivers' and 'ras/edac-misc' into edac-updates



* ras/edac-drivers:
  EDAC/cell: Remove powerpc Cell driver
  EDAC: Add an EDAC driver for the Loongson memory controller
  EDAC/{i10nm,skx,skx_common}: Support UV systems
  EDAC/i10nm: Add Intel Clearwater Forest server support

* ras/edac-misc:
  EDAC: Fix typos in comments

Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
parents 6696037a 586e62fe
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+1 −1
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ static int edac_mc_alloc_csrows(struct mem_ctl_info *mci)
	unsigned int row, chn;

	/*
	 * Alocate and fill the csrow/channels structs
	 * Allocate and fill the csrow/channels structs
	 */
	mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
	if (!mci->csrows)
+3 −3
Original line number Diff line number Diff line
@@ -422,7 +422,7 @@ static inline int nr_pages_per_csrow(struct csrow_info *csrow)
	return nr_pages;
}

/* Create a CSROW object under specifed edac_mc_device */
/* Create a CSROW object under specified edac_mc_device */
static int edac_create_csrow_object(struct mem_ctl_info *mci,
				    struct csrow_info *csrow, int index)
{
@@ -449,7 +449,7 @@ static int edac_create_csrow_object(struct mem_ctl_info *mci,
	return 0;
}

/* Create a CSROW object under specifed edac_mc_device */
/* Create a CSROW object under specified edac_mc_device */
static int edac_create_csrow_objects(struct mem_ctl_info *mci)
{
	int err, i;
@@ -636,7 +636,7 @@ static void dimm_release(struct device *dev)
	 */
}

/* Create a DIMM object under specifed memory controller device */
/* Create a DIMM object under specified memory controller device */
static int edac_create_dimm_object(struct mem_ctl_info *mci,
				   struct dimm_info *dimm)
{
+4 −4
Original line number Diff line number Diff line
@@ -338,11 +338,11 @@ struct i5000_pvt {

	u16 mir0, mir1, mir2;

	u16 b0_mtr[NUM_MTRS];	/* Memory Technlogy Reg */
	u16 b0_mtr[NUM_MTRS];	/* Memory Technology Reg */
	u16 b0_ambpresent0;	/* Branch 0, Channel 0 */
	u16 b0_ambpresent1;	/* Brnach 0, Channel 1 */
	u16 b0_ambpresent1;	/* Branch 0, Channel 1 */

	u16 b1_mtr[NUM_MTRS];	/* Memory Technlogy Reg */
	u16 b1_mtr[NUM_MTRS];	/* Memory Technology Reg */
	u16 b1_ambpresent0;	/* Branch 1, Channel 8 */
	u16 b1_ambpresent1;	/* Branch 1, Channel 1 */

@@ -1210,7 +1210,7 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
			&pvt->b0_ambpresent1);
	edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);

	/* Only if we have 2 branchs (4 channels) */
	/* Only if we have 2 branches (4 channels) */
	if (pvt->maxch < CHANNELS_PER_BRANCH) {
		pvt->b1_ambpresent0 = 0;
		pvt->b1_ambpresent1 = 0;