Unverified Commit 369ea9f8 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown
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ASoC: SOF: Intel: hda: Add definition for SDxFIFOS.FIFOS mask 



The FIFOS (FIFO Size) field is in bit 0-15 of the register.
Use the defined mask instead of a magic number for the FIFOS value
masking in hda_dsp_stream_hw_params().

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarGuennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarChao Song <chao.song@linux.intel.com>
Link: https://lore.kernel.org/r/20230915114018.1701-3-peter.ujfalusi@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c2d8f17e

sound/soc/sof/intel/hda-stream.c

+1 −1
Original line number Diff line number Diff line
@@ -668,7 +668,7 @@ int hda_dsp_stream_hw_params(struct snd_sof_dev *sdev, 
			snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,

					 sd_offset +

					 SOF_HDA_ADSP_REG_SD_FIFOSIZE);

		hstream->fifo_size &= 0xffff;

		hstream->fifo_size &= SOF_HDA_SD_FIFOSIZE_FIFOS_MASK;

		hstream->fifo_size += 1;

	} else {

		hstream->fifo_size = 0;

sound/soc/sof/intel/hda.h

+3 −0
Original line number Diff line number Diff line
@@ -135,6 +135,9 @@ 
#define SOF_HDA_ADSP_REG_SD_BDLPU		0x1C

#define SOF_HDA_ADSP_SD_ENTRY_SIZE		0x20



/* SDxFIFOS FIFOS */

#define SOF_HDA_SD_FIFOSIZE_FIFOS_MASK		GENMASK(15, 0)



/* CL: Software Position Based FIFO Capability Registers */

#define SOF_DSP_REG_CL_SPBFIFO \

	(SOF_HDA_ADSP_LOADER_BASE + 0x20)