Commit 36c52fb7 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2025-06-18' of... 

Merge tag 'drm-intel-next-2025-06-18' of https://gitlab.freedesktop.org/drm/i915/kernel

 into drm-next

drm/i915 feature pull for v6.17:

Features and functionality:
- Add support for DSC fractional link bpp on DP MST (Imre)
- Add support for simultaneous Panel Replay and Adaptive Sync (Jouni)
- Add support for PTL+ double buffered LUT registers (Chaitanya, Ville)
- Add PIPEDMC event handling in preparation for flip queue (Ville)

Refactoring and cleanups:
- Rename lots of DPLL interfaces to unify them (Suraj)
- Allocate struct intel_display dynamically (Jani)
- Abstract VLV IOSF sideband better (Jani)
- Use str_true_false() helper (Yumeng Fang)
- Refactor DSB code in preparation for flip queue (Ville)
- Use drm_modeset_lock_assert_held() instead of open coding (Luca)
- Remove unused arg from skl_scaler_get_filter_select() (Luca)
- Split out a separate display register header (Jani)
- Abstract DRAM detection better (Jani)
- Convert LPT/WPT SBI sideband to struct intel_display (Jani)

Fixes:
- Fix DSI HS command dispatch with forced pipeline flush (Gareth Yu)
- Fix BMG and LNL+ DP adaptive sync SDP programming (Ankit)
- Fix error path for xe display workqueue allocation (Haoxiang Li)
- Disable DP AUX access probe where not required (Imre)
- Fix DKL PHY access if the port is invalid (Luca)
- Fix PSR2_SU_STATUS access on ADL+ (Jouni)
- Add sanity checks for porch and sync on BXT/GLK DSI (Ville)

DRM core changes:
- Change AUX DPCD access probe address (Imre)
- Refactor EDID quirks, amd make them available to drivers (Imre)
- Add quirk for DPCD access probe (Imre)
- Add DPCD definitions for Panel Replay capabilities (Jouni)

Merges:
- Backmerges to sync with v6.15-rcs and v6.16-rc1 (Jani)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/fff9f231850ed410bd81b53de43eff0b98240d31@intel.com
parents 9356b50a b2f7e30d

drivers/gpu/drm/display/drm_dp_helper.c

+30 −14
Original line number Diff line number Diff line
@@ -692,6 +692,34 @@ void drm_dp_dpcd_set_powered(struct drm_dp_aux *aux, bool powered) 
}

EXPORT_SYMBOL(drm_dp_dpcd_set_powered);



/**

 * drm_dp_dpcd_set_probe() - Set whether a probing before DPCD access is done

 * @aux: DisplayPort AUX channel

 * @enable: Enable the probing if required

 */

void drm_dp_dpcd_set_probe(struct drm_dp_aux *aux, bool enable)

{

	WRITE_ONCE(aux->dpcd_probe_disabled, !enable);

}

EXPORT_SYMBOL(drm_dp_dpcd_set_probe);



static bool dpcd_access_needs_probe(struct drm_dp_aux *aux)

{

	/*

	 * HP ZR24w corrupts the first DPCD access after entering power save

	 * mode. Eg. on a read, the entire buffer will be filled with the same

	 * byte. Do a throw away read to avoid corrupting anything we care

	 * about. Afterwards things will work correctly until the monitor

	 * gets woken up and subsequently re-enters power save mode.

	 *

	 * The user pressing any button on the monitor is enough to wake it

	 * up, so there is no particularly good place to do the workaround.

	 * We just have to do it before any DPCD access and hope that the

	 * monitor doesn't power down exactly after the throw away read.

	 */

	return !aux->is_remote && !READ_ONCE(aux->dpcd_probe_disabled);

}



/**

 * drm_dp_dpcd_read() - read a series of bytes from the DPCD

 * @aux: DisplayPort AUX channel (SST or MST)
@@ -713,20 +741,8 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, 
{

	int ret;



	/*

	 * HP ZR24w corrupts the first DPCD access after entering power save

	 * mode. Eg. on a read, the entire buffer will be filled with the same

	 * byte. Do a throw away read to avoid corrupting anything we care

	 * about. Afterwards things will work correctly until the monitor

	 * gets woken up and subsequently re-enters power save mode.

	 *

	 * The user pressing any button on the monitor is enough to wake it

	 * up, so there is no particularly good place to do the workaround.

	 * We just have to do it before any DPCD access and hope that the

	 * monitor doesn't power down exactly after the throw away read.

	 */

	if (!aux->is_remote) {

		ret = drm_dp_dpcd_probe(aux, DP_DPCD_REV);

	if (dpcd_access_needs_probe(aux)) {

		ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS);

		if (ret < 0)

			return ret;

	}

drivers/gpu/drm/drm_edid.c

+126 −106
Original line number Diff line number Diff line
@@ -67,34 +67,36 @@ static int oui(u8 first, u8 second, u8 third) 
 * on as many displays as possible).

 */



enum drm_edid_internal_quirk {

	/* First detailed mode wrong, use largest 60Hz mode */

#define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)

	EDID_QUIRK_PREFER_LARGE_60 = DRM_EDID_QUIRK_NUM,

	/* Reported 135MHz pixel clock is too high, needs adjustment */

#define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)

	EDID_QUIRK_135_CLOCK_TOO_HIGH,

	/* Prefer the largest mode at 75 Hz */

#define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)

	EDID_QUIRK_PREFER_LARGE_75,

	/* Detail timing is in cm not mm */

#define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)

	EDID_QUIRK_DETAILED_IN_CM,

	/* Detailed timing descriptors have bogus size values, so just take the

	 * maximum size and use that.

	 */

#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)

	EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE,

	/* use +hsync +vsync for detailed mode */

#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)

	EDID_QUIRK_DETAILED_SYNC_PP,

	/* Force reduced-blanking timings for detailed modes */

#define EDID_QUIRK_FORCE_REDUCED_BLANKING	(1 << 7)

	EDID_QUIRK_FORCE_REDUCED_BLANKING,

	/* Force 8bpc */

#define EDID_QUIRK_FORCE_8BPC			(1 << 8)

	EDID_QUIRK_FORCE_8BPC,

	/* Force 12bpc */

#define EDID_QUIRK_FORCE_12BPC			(1 << 9)

	EDID_QUIRK_FORCE_12BPC,

	/* Force 6bpc */

#define EDID_QUIRK_FORCE_6BPC			(1 << 10)

	EDID_QUIRK_FORCE_6BPC,

	/* Force 10bpc */

#define EDID_QUIRK_FORCE_10BPC			(1 << 11)

	EDID_QUIRK_FORCE_10BPC,

	/* Non desktop display (i.e. HMD) */

#define EDID_QUIRK_NON_DESKTOP			(1 << 12)

	EDID_QUIRK_NON_DESKTOP,

	/* Cap the DSC target bitrate to 15bpp */

#define EDID_QUIRK_CAP_DSC_15BPP		(1 << 13)

	EDID_QUIRK_CAP_DSC_15BPP,

};



#define MICROSOFT_IEEE_OUI	0xca125c
@@ -129,124 +131,132 @@ static const struct edid_quirk { 
	u32 quirks;

} edid_quirk_list[] = {

	/* Acer AL1706 */

	EDID_QUIRK('A', 'C', 'R', 44358, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('A', 'C', 'R', 44358, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	/* Acer F51 */

	EDID_QUIRK('A', 'P', 'I', 0x7602, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('A', 'P', 'I', 0x7602, BIT(EDID_QUIRK_PREFER_LARGE_60)),



	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */

	EDID_QUIRK('A', 'E', 'O', 0, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('A', 'E', 'O', 0, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* BenQ GW2765 */

	EDID_QUIRK('B', 'N', 'Q', 0x78d6, EDID_QUIRK_FORCE_8BPC),

	EDID_QUIRK('B', 'N', 'Q', 0x78d6, BIT(EDID_QUIRK_FORCE_8BPC)),



	/* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */

	EDID_QUIRK('B', 'O', 'E', 0x78b, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('B', 'O', 'E', 0x78b, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */

	EDID_QUIRK('C', 'P', 'T', 0x17df, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('C', 'P', 'T', 0x17df, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */

	EDID_QUIRK('S', 'D', 'C', 0x3652, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('S', 'D', 'C', 0x3652, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */

	EDID_QUIRK('B', 'O', 'E', 0x0771, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('B', 'O', 'E', 0x0771, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* Belinea 10 15 55 */

	EDID_QUIRK('M', 'A', 'X', 1516, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('M', 'A', 'X', 0x77e, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('M', 'A', 'X', 1516, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	EDID_QUIRK('M', 'A', 'X', 0x77e, BIT(EDID_QUIRK_PREFER_LARGE_60)),



	/* Envision Peripherals, Inc. EN-7100e */

	EDID_QUIRK('E', 'P', 'I', 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH),

	EDID_QUIRK('E', 'P', 'I', 59264, BIT(EDID_QUIRK_135_CLOCK_TOO_HIGH)),

	/* Envision EN2028 */

	EDID_QUIRK('E', 'P', 'I', 8232, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('E', 'P', 'I', 8232, BIT(EDID_QUIRK_PREFER_LARGE_60)),



	/* Funai Electronics PM36B */

	EDID_QUIRK('F', 'C', 'M', 13600, EDID_QUIRK_PREFER_LARGE_75 |

				       EDID_QUIRK_DETAILED_IN_CM),

	EDID_QUIRK('F', 'C', 'M', 13600, BIT(EDID_QUIRK_PREFER_LARGE_75) |

					 BIT(EDID_QUIRK_DETAILED_IN_CM)),



	/* LG 27GP950 */

	EDID_QUIRK('G', 'S', 'M', 0x5bbf, EDID_QUIRK_CAP_DSC_15BPP),

	EDID_QUIRK('G', 'S', 'M', 0x5bbf, BIT(EDID_QUIRK_CAP_DSC_15BPP)),



	/* LG 27GN950 */

	EDID_QUIRK('G', 'S', 'M', 0x5b9a, EDID_QUIRK_CAP_DSC_15BPP),

	EDID_QUIRK('G', 'S', 'M', 0x5b9a, BIT(EDID_QUIRK_CAP_DSC_15BPP)),



	/* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */

	EDID_QUIRK('L', 'G', 'D', 764, EDID_QUIRK_FORCE_10BPC),

	EDID_QUIRK('L', 'G', 'D', 764, BIT(EDID_QUIRK_FORCE_10BPC)),



	/* LG Philips LCD LP154W01-A5 */

	EDID_QUIRK('L', 'P', 'L', 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE),

	EDID_QUIRK('L', 'P', 'L', 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE),

	EDID_QUIRK('L', 'P', 'L', 0, BIT(EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)),

	EDID_QUIRK('L', 'P', 'L', 0x2a00, BIT(EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)),



	/* Samsung SyncMaster 205BW.  Note: irony */

	EDID_QUIRK('S', 'A', 'M', 541, EDID_QUIRK_DETAILED_SYNC_PP),

	EDID_QUIRK('S', 'A', 'M', 541, BIT(EDID_QUIRK_DETAILED_SYNC_PP)),

	/* Samsung SyncMaster 22[5-6]BW */

	EDID_QUIRK('S', 'A', 'M', 596, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('S', 'A', 'M', 638, EDID_QUIRK_PREFER_LARGE_60),

	EDID_QUIRK('S', 'A', 'M', 596, BIT(EDID_QUIRK_PREFER_LARGE_60)),

	EDID_QUIRK('S', 'A', 'M', 638, BIT(EDID_QUIRK_PREFER_LARGE_60)),



	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */

	EDID_QUIRK('S', 'N', 'Y', 0x2541, EDID_QUIRK_FORCE_12BPC),

	EDID_QUIRK('S', 'N', 'Y', 0x2541, BIT(EDID_QUIRK_FORCE_12BPC)),



	/* ViewSonic VA2026w */

	EDID_QUIRK('V', 'S', 'C', 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING),

	EDID_QUIRK('V', 'S', 'C', 5020, BIT(EDID_QUIRK_FORCE_REDUCED_BLANKING)),



	/* Medion MD 30217 PG */

	EDID_QUIRK('M', 'E', 'D', 0x7b8, EDID_QUIRK_PREFER_LARGE_75),

	EDID_QUIRK('M', 'E', 'D', 0x7b8, BIT(EDID_QUIRK_PREFER_LARGE_75)),



	/* Lenovo G50 */

	EDID_QUIRK('S', 'D', 'C', 18514, EDID_QUIRK_FORCE_6BPC),

	EDID_QUIRK('S', 'D', 'C', 18514, BIT(EDID_QUIRK_FORCE_6BPC)),



	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */

	EDID_QUIRK('S', 'E', 'C', 0xd033, EDID_QUIRK_FORCE_8BPC),

	EDID_QUIRK('S', 'E', 'C', 0xd033, BIT(EDID_QUIRK_FORCE_8BPC)),



	/* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/

	EDID_QUIRK('E', 'T', 'R', 13896, EDID_QUIRK_FORCE_8BPC),

	EDID_QUIRK('E', 'T', 'R', 13896, BIT(EDID_QUIRK_FORCE_8BPC)),



	/* Valve Index Headset */

	EDID_QUIRK('V', 'L', 'V', 0x91a8, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b0, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b1, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b2, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b3, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b4, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b5, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b6, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b7, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b8, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91b9, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91ba, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91bb, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91bc, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91bd, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91be, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91bf, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('V', 'L', 'V', 0x91a8, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b0, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b1, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b2, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b3, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b4, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b5, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b6, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b7, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b8, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91b9, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91ba, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91bb, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91bc, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91bd, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91be, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('V', 'L', 'V', 0x91bf, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* HTC Vive and Vive Pro VR Headsets */

	EDID_QUIRK('H', 'V', 'R', 0xaa01, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('H', 'V', 'R', 0xaa02, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('H', 'V', 'R', 0xaa01, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('H', 'V', 'R', 0xaa02, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* Oculus Rift DK1, DK2, CV1 and Rift S VR Headsets */

	EDID_QUIRK('O', 'V', 'R', 0x0001, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('O', 'V', 'R', 0x0003, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('O', 'V', 'R', 0x0004, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('O', 'V', 'R', 0x0012, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('O', 'V', 'R', 0x0001, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('O', 'V', 'R', 0x0003, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('O', 'V', 'R', 0x0004, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('O', 'V', 'R', 0x0012, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* Windows Mixed Reality Headsets */

	EDID_QUIRK('A', 'C', 'R', 0x7fce, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('L', 'E', 'N', 0x0408, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('F', 'U', 'J', 0x1970, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('D', 'E', 'L', 0x7fce, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('S', 'E', 'C', 0x144a, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('A', 'U', 'S', 0xc102, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('A', 'C', 'R', 0x7fce, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('L', 'E', 'N', 0x0408, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('F', 'U', 'J', 0x1970, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('D', 'E', 'L', 0x7fce, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('S', 'E', 'C', 0x144a, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('A', 'U', 'S', 0xc102, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* Sony PlayStation VR Headset */

	EDID_QUIRK('S', 'N', 'Y', 0x0704, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('S', 'N', 'Y', 0x0704, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* Sensics VR Headsets */

	EDID_QUIRK('S', 'E', 'N', 0x1019, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('S', 'E', 'N', 0x1019, BIT(EDID_QUIRK_NON_DESKTOP)),



	/* OSVR HDK and HDK2 VR Headsets */

	EDID_QUIRK('S', 'V', 'R', 0x1019, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('A', 'U', 'O', 0x1111, EDID_QUIRK_NON_DESKTOP),

	EDID_QUIRK('S', 'V', 'R', 0x1019, BIT(EDID_QUIRK_NON_DESKTOP)),

	EDID_QUIRK('A', 'U', 'O', 0x1111, BIT(EDID_QUIRK_NON_DESKTOP)),



	/*

	 * @drm_edid_internal_quirk entries end here, following with the

	 * @drm_edid_quirk entries.

	 */



	/* HP ZR24w DP AUX DPCD access requires probing to prevent corruption. */

	EDID_QUIRK('H', 'W', 'P', 0x2869, BIT(DRM_EDID_QUIRK_DP_DPCD_PROBE)),

};



/*
@@ -2952,6 +2962,18 @@ static u32 edid_get_quirks(const struct drm_edid *drm_edid) 
	return 0;

}



static bool drm_edid_has_internal_quirk(struct drm_connector *connector,

					enum drm_edid_internal_quirk quirk)

{

	return connector->display_info.quirks & BIT(quirk);

}



bool drm_edid_has_quirk(struct drm_connector *connector, enum drm_edid_quirk quirk)

{

	return connector->display_info.quirks & BIT(quirk);

}

EXPORT_SYMBOL(drm_edid_has_quirk);



#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)

#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
@@ -2961,7 +2983,6 @@ static u32 edid_get_quirks(const struct drm_edid *drm_edid) 
 */

static void edid_fixup_preferred(struct drm_connector *connector)

{

	const struct drm_display_info *info = &connector->display_info;

	struct drm_display_mode *t, *cur_mode, *preferred_mode;

	int target_refresh = 0;

	int cur_vrefresh, preferred_vrefresh;
@@ -2969,9 +2990,9 @@ static void edid_fixup_preferred(struct drm_connector *connector) 
	if (list_empty(&connector->probed_modes))

		return;



	if (info->quirks & EDID_QUIRK_PREFER_LARGE_60)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_60))

		target_refresh = 60;

	if (info->quirks & EDID_QUIRK_PREFER_LARGE_75)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_75))

		target_refresh = 75;



	preferred_mode = list_first_entry(&connector->probed_modes,
@@ -3475,7 +3496,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto 
						  const struct drm_edid *drm_edid,

						  const struct detailed_timing *timing)

{

	const struct drm_display_info *info = &connector->display_info;

	struct drm_device *dev = connector->dev;

	struct drm_display_mode *mode;

	const struct detailed_pixel_timing *pt = &timing->data.pixel_data;
@@ -3509,7 +3529,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto 
		return NULL;

	}



	if (info->quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_REDUCED_BLANKING)) {

		mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);

		if (!mode)

			return NULL;
@@ -3521,7 +3541,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto 
	if (!mode)

		return NULL;



	if (info->quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_135_CLOCK_TOO_HIGH))

		mode->clock = 1088 * 10;

	else

		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
@@ -3552,7 +3572,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto 


	drm_mode_do_interlace_quirk(mode, pt);



	if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) {

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_SYNC_PP)) {

		mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;

	} else {

		mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
@@ -3565,12 +3585,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_connector *connecto 
	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;

	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;



	if (info->quirks & EDID_QUIRK_DETAILED_IN_CM) {

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_IN_CM)) {

		mode->width_mm *= 10;

		mode->height_mm *= 10;

	}



	if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE)) {

		mode->width_mm = drm_edid->edid->width_cm * 10;

		mode->height_mm = drm_edid->edid->height_cm * 10;

	}
@@ -6735,26 +6755,26 @@ static void update_display_info(struct drm_connector *connector, 
	drm_update_mso(connector, drm_edid);



out:

	if (info->quirks & EDID_QUIRK_NON_DESKTOP) {

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_NON_DESKTOP)) {

		drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Non-desktop display%s\n",

			    connector->base.id, connector->name,

			    info->non_desktop ? " (redundant quirk)" : "");

		info->non_desktop = true;

	}



	if (info->quirks & EDID_QUIRK_CAP_DSC_15BPP)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_CAP_DSC_15BPP))

		info->max_dsc_bpp = 15;



	if (info->quirks & EDID_QUIRK_FORCE_6BPC)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_6BPC))

		info->bpc = 6;



	if (info->quirks & EDID_QUIRK_FORCE_8BPC)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_8BPC))

		info->bpc = 8;



	if (info->quirks & EDID_QUIRK_FORCE_10BPC)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_10BPC))

		info->bpc = 10;



	if (info->quirks & EDID_QUIRK_FORCE_12BPC)

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_FORCE_12BPC))

		info->bpc = 12;



	/* Depends on info->cea_rev set by drm_parse_cea_ext() above */
@@ -6919,7 +6939,6 @@ static int add_displayid_detailed_modes(struct drm_connector *connector, 
static int _drm_edid_connector_add_modes(struct drm_connector *connector,

					 const struct drm_edid *drm_edid)

{

	const struct drm_display_info *info = &connector->display_info;

	int num_modes = 0;



	if (!drm_edid)
@@ -6949,7 +6968,8 @@ static int _drm_edid_connector_add_modes(struct drm_connector *connector, 
	if (drm_edid->edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ)

		num_modes += add_inferred_modes(connector, drm_edid);



	if (info->quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))

	if (drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_60) ||

	    drm_edid_has_internal_quirk(connector, EDID_QUIRK_PREFER_LARGE_75))

		edid_fixup_preferred(connector);



	return num_modes;

drivers/gpu/drm/i915/Makefile

+4 −3
Original line number Diff line number Diff line
@@ -40,12 +40,11 @@ i915-y += \ 
	intel_pcode.o \

	intel_region_ttm.o \

	intel_runtime_pm.o \

	intel_sbi.o \

	intel_step.o \

	intel_uncore.o \

	intel_uncore_trace.o \

	intel_wakeref.o \

	vlv_sideband.o \

	vlv_iosf_sb.o \

	vlv_suspend.o



# core peripheral code
@@ -288,6 +287,7 @@ i915-y += \ 
	display/intel_pmdemand.o \

	display/intel_psr.o \

	display/intel_quirks.o \

	display/intel_sbi.o \

	display/intel_sprite.o \

	display/intel_sprite_uapi.o \

	display/intel_tc.o \
@@ -296,7 +296,8 @@ i915-y += \ 
	display/intel_wm.o \

	display/skl_scaler.o \

	display/skl_universal_plane.o \

	display/skl_watermark.o

	display/skl_watermark.o \

	display/vlv_sideband.o

i915-$(CONFIG_ACPI) += \

	display/intel_acpi.o \

	display/intel_opregion.o

drivers/gpu/drm/i915/display/g4x_dp.c

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include "intel_crtc.h"

#include "intel_de.h"

#include "intel_display_power.h"

#include "intel_display_regs.h"

#include "intel_display_types.h"

#include "intel_dp.h"

#include "intel_dp_aux.h"

drivers/gpu/drm/i915/display/g4x_hdmi.c

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include "intel_crtc.h"

#include "intel_de.h"

#include "intel_display_power.h"

#include "intel_display_regs.h"

#include "intel_display_types.h"

#include "intel_dp_aux.h"

#include "intel_dpio_phy.h"