Commit 36e81d6a authored by Frank Li's avatar Frank Li Committed by Shawn Guo
Browse files

arm64: dts: imx8qm: add thermal zone and cooling map 



Add thermal zone and cooling map for cpufreq.

Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 88114e10

arch/arm64/boot/dts/freescale/imx8qm.dtsi

+134 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/pinctrl/pads-imx8qm.h>

#include <dt-bindings/thermal/thermal.h>



/ {

	interrupt-parent = <&gic>;
@@ -72,6 +73,7 @@ A53_0: cpu@0 { 
			d-cache-sets = <128>;

			next-level-cache = <&A53_L2>;

			operating-points-v2 = <&a53_opp_table>;

			#cooling-cells = <2>;

		};



		A53_1: cpu@1 {
@@ -88,6 +90,7 @@ A53_1: cpu@1 { 
			d-cache-sets = <128>;

			next-level-cache = <&A53_L2>;

			operating-points-v2 = <&a53_opp_table>;

			#cooling-cells = <2>;

		};



		A53_2: cpu@2 {
@@ -104,6 +107,7 @@ A53_2: cpu@2 { 
			d-cache-sets = <128>;

			next-level-cache = <&A53_L2>;

			operating-points-v2 = <&a53_opp_table>;

			#cooling-cells = <2>;

		};



		A53_3: cpu@3 {
@@ -120,6 +124,7 @@ A53_3: cpu@3 { 
			d-cache-sets = <128>;

			next-level-cache = <&A53_L2>;

			operating-points-v2 = <&a53_opp_table>;

			#cooling-cells = <2>;

		};



		A72_0: cpu@100 {
@@ -136,6 +141,7 @@ A72_0: cpu@100 { 
			d-cache-sets = <256>;

			next-level-cache = <&A72_L2>;

			operating-points-v2 = <&a72_opp_table>;

			#cooling-cells = <2>;

		};



		A72_1: cpu@101 {
@@ -146,6 +152,7 @@ A72_1: cpu@101 { 
			enable-method = "psci";

			next-level-cache = <&A72_L2>;

			operating-points-v2 = <&a72_opp_table>;

			#cooling-cells = <2>;

		};



		A53_L2: l2-cache0 {
@@ -284,6 +291,133 @@ iomuxc: pinctrl { 
		rtc: rtc {

			compatible = "fsl,imx8qxp-sc-rtc";

		};



		tsens: thermal-sensor {

			compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";

			#thermal-sensor-cells = <1>;

		};

	};



	thermal-zones {

		cpu0-thermal {

			polling-delay-passive = <250>;

			polling-delay = <2000>;

			thermal-sensors = <&tsens IMX_SC_R_A53>;



			trips {

				cpu_alert0: trip0 {

					temperature = <107000>;

					hysteresis = <2000>;

					type = "passive";

				};



				cpu_crit0: trip1 {

					temperature = <127000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert0>;

					cooling-device =

						<&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



		cpu1-thermal {

			polling-delay-passive = <250>;

			polling-delay = <2000>;

			thermal-sensors = <&tsens IMX_SC_R_A72>;



			trips {

				cpu_alert1: trip0 {

					temperature = <107000>;

					hysteresis = <2000>;

					type = "passive";

				};



				cpu_crit1: trip1 {

					temperature = <127000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert1>;

					cooling-device =

						<&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



		gpu0-thermal {

			polling-delay-passive = <250>;

			polling-delay = <2000>;

			thermal-sensors = <&tsens IMX_SC_R_GPU_0_PID0>;



			trips {

				gpu_alert0: trip0 {

					temperature = <107000>;

					hysteresis = <2000>;

					type = "passive";

				};



				gpu_crit0: trip1 {

					temperature = <127000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



	       gpu1-thermal {

			polling-delay-passive = <250>;

			polling-delay = <2000>;

			thermal-sensors = <&tsens IMX_SC_R_GPU_1_PID0>;



			trips {

				gpu_alert1: trip0 {

					temperature = <107000>;

					hysteresis = <2000>;

					type = "passive";

				};



				gpu_crit1: trip1 {

					temperature = <127000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};



		drc0-thermal {

			polling-delay-passive = <250>;

			polling-delay = <2000>;

			thermal-sensors = <&tsens IMX_SC_R_DRC_0>;



			trips {

				drc_alert0: trip0 {

					temperature = <107000>;

					hysteresis = <2000>;

					type = "passive";

				};



				drc_crit0: trip1 {

					temperature = <127000>;

					hysteresis = <2000>;

					type = "critical";

				};

			};

		};

	};



	/* sorted in register address */