Commit 377ea331 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge tag 'mlx5-next-lag' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux 

Tariq Toukan says:

====================
mlx5-next updates 2025-09-28

* tag 'mlx5-next-lag' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux:
  net/mlx5: IFC add balance ID and LAG per MP group bits
  net/mlx5: Add IFC bit for TIR/SQ order capability
====================

Link: https://patch.msgid.link/1759093989-841873-1-git-send-email-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 6d3728d4 137d1a63

include/linux/mlx5/mlx5_ifc.h

+8 −3
Original line number Diff line number Diff line
@@ -1895,7 +1895,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { 


	u8         reserved_at_2a0[0x7];

	u8         mkey_pcie_tph[0x1];

	u8         reserved_at_2a8[0x2];

	u8         reserved_at_2a8[0x1];

	u8         tis_tir_td_order[0x1];



	u8         psp[0x1];

	u8         shampo[0x1];
@@ -2234,12 +2235,16 @@ struct mlx5_ifc_cmd_hca_cap_2_bits { 
	u8	   reserved_at_440[0x8];

	u8	   max_num_eqs_24b[0x18];



	u8         reserved_at_460[0x160];

	u8         reserved_at_460[0x144];

	u8         load_balance_id[0x4];

	u8         reserved_at_5a8[0x18];



	u8         query_adjacent_functions_id[0x1];

	u8         ingress_egress_esw_vport_connect[0x1];

	u8         function_id_type_vhca_id[0x1];

	u8         reserved_at_5c3[0xd];

	u8         reserved_at_5c3[0x1];

	u8         lag_per_mp_group[0x1];

	u8         reserved_at_5c5[0xb];

	u8         delegate_vhca_management_profiles[0x10];



	u8         delegated_vhca_max[0x10];