Commit 37889600 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm: Use drm_gpuvm types more 



Most of the driver code doesn't need to reach in to msm specific fields,
so just use the drm_gpuvm/drm_gpuva types directly.  This should
hopefully improve commonality with other drivers and make the code
easier to understand.

Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Signed-off-by: default avatarRob Clark <robin.clark@oss.qualcomm.com>
Tested-by: default avatarAntonino Maniscalco <antomani103@gmail.com>
Reviewed-by: default avatarAntonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/661483/
parent fe4952b5

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+3 −3
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ static int a2xx_hw_init(struct msm_gpu *gpu) 
	uint32_t *ptr, len;

	int i, ret;



	a2xx_gpummu_params(gpu->vm->mmu, &pt_base, &tran_error);

	a2xx_gpummu_params(to_msm_vm(gpu->vm)->mmu, &pt_base, &tran_error);



	DBG("%s", gpu->name);
@@ -466,11 +466,11 @@ static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) 
	return state;

}



static struct msm_gem_vm *

static struct drm_gpuvm *

a2xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev)

{

	struct msm_mmu *mmu = a2xx_gpummu_new(&pdev->dev, gpu);

	struct msm_gem_vm *vm;

	struct drm_gpuvm *vm;



	vm = msm_gem_vm_create(gpu->dev, mmu, "gpu", SZ_16M, 0xfff * SZ_64K, true);

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+2 −1
Original line number Diff line number Diff line
@@ -1786,7 +1786,8 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) 
		return ERR_PTR(ret);

	}



	msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a5xx_fault_handler);

	msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu,

				  a5xx_fault_handler);



	/* Set up the preemption specific bits and pieces for each ringbuffer */

	a5xx_preempt_init(gpu);

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

+4 −2
Original line number Diff line number Diff line
@@ -1259,6 +1259,8 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) 


static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu)

{

	struct msm_mmu *mmu = to_msm_vm(gmu->vm)->mmu;



	msm_gem_kernel_put(gmu->hfi.obj, gmu->vm);

	msm_gem_kernel_put(gmu->debug.obj, gmu->vm);

	msm_gem_kernel_put(gmu->icache.obj, gmu->vm);
@@ -1266,8 +1268,8 @@ static void a6xx_gmu_memory_free(struct a6xx_gmu *gmu) 
	msm_gem_kernel_put(gmu->dummy.obj, gmu->vm);

	msm_gem_kernel_put(gmu->log.obj, gmu->vm);



	gmu->vm->mmu->funcs->detach(gmu->vm->mmu);

	msm_gem_vm_put(gmu->vm);

	mmu->funcs->detach(mmu);

	drm_gpuvm_put(gmu->vm);

}



static int a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo,

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ struct a6xx_gmu { 
	/* For serializing communication with the GMU: */

	struct mutex lock;



	struct msm_gem_vm *vm;

	struct drm_gpuvm *vm;



	void __iomem *mmio;

	void __iomem *rscc;

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+6 −5
Original line number Diff line number Diff line
@@ -120,7 +120,7 @@ static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu, 
	if (ctx->seqno == ring->cur_ctx_seqno)

		return;



	if (msm_iommu_pagetable_params(ctx->vm->mmu, &ttbr, &asid))

	if (msm_iommu_pagetable_params(to_msm_vm(ctx->vm)->mmu, &ttbr, &asid))

		return;



	if (adreno_gpu->info->family >= ADRENO_7XX_GEN1) {
@@ -2256,7 +2256,7 @@ static void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp, 
	mutex_unlock(&a6xx_gpu->gmu.lock);

}



static struct msm_gem_vm *

static struct drm_gpuvm *

a6xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
@@ -2274,12 +2274,12 @@ a6xx_create_vm(struct msm_gpu *gpu, struct platform_device *pdev) 
	return adreno_iommu_create_vm(gpu, pdev, quirks);

}



static struct msm_gem_vm *

static struct drm_gpuvm *

a6xx_create_private_vm(struct msm_gpu *gpu)

{

	struct msm_mmu *mmu;



	mmu = msm_iommu_pagetable_create(gpu->vm->mmu);

	mmu = msm_iommu_pagetable_create(to_msm_vm(gpu->vm)->mmu);



	if (IS_ERR(mmu))

		return ERR_CAST(mmu);
@@ -2559,7 +2559,8 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) 


	adreno_gpu->uche_trap_base = 0x1fffffffff000ull;



	msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a6xx_fault_handler);

	msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu,

				  a6xx_fault_handler);



	a6xx_calc_ubwc_config(adreno_gpu);

	/* Set up the preemption specific bits and pieces for each ringbuffer */