Commit 379c7752 authored by Judith Mendez's avatar Judith Mendez Committed by Vignesh Raghavendra
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arm64: dts: ti: k3-am64-main: Fix ITAP/OTAP values for MMC

Update MMC0/MMC1 OTAP/ITAP values according to the datasheet
[0], refer to Table 7-68 for MMC0 and Table 7-77 for MMC1.

[0] https://www.ti.com/lit/ds/symlink/am6442.pdf



Fixes: 8abae938 ("arm64: dts: ti: Add support for AM642 SoC")
Signed-off-by: default avatarJudith Mendez <jm@ti.com>
Tested-by: default avatarWadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240213235701.2438513-5-jm@ti.com


Signed-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent e041ec6e
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+8 −1
Original line number Diff line number Diff line
@@ -634,6 +634,9 @@ sdhci0: mmc@fa10000 {
		ti,otap-del-sel-mmc-hs = <0x0>;
		ti,otap-del-sel-ddr52 = <0x6>;
		ti,otap-del-sel-hs200 = <0x7>;
		ti,itap-del-sel-legacy = <0x10>;
		ti,itap-del-sel-mmc-hs = <0xa>;
		ti,itap-del-sel-ddr52 = <0x3>;
		status = "disabled";
	};

@@ -646,12 +649,16 @@ sdhci1: mmc@fa00000 {
		clock-names = "clk_ahb", "clk_xin";
		ti,trm-icp = <0x2>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-sd-hs = <0xf>;
		ti,otap-del-sel-sd-hs = <0x0>;
		ti,otap-del-sel-sdr12 = <0xf>;
		ti,otap-del-sel-sdr25 = <0xf>;
		ti,otap-del-sel-sdr50 = <0xc>;
		ti,otap-del-sel-sdr104 = <0x6>;
		ti,otap-del-sel-ddr50 = <0x9>;
		ti,itap-del-sel-legacy = <0x0>;
		ti,itap-del-sel-sd-hs = <0x0>;
		ti,itap-del-sel-sdr12 = <0x0>;
		ti,itap-del-sel-sdr25 = <0x0>;
		ti,clkbuf-sel = <0x7>;
		status = "disabled";
	};