Commit 37c57631 authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amd/pm: support new mca smu error code decoding 



support new mca smu error code decoding from smu 85.86.0 for smu v13.0.6

Signed-off-by: default avatarYang Wang <kevinyang.wang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 78825df9

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h

+2 −0
Original line number Diff line number Diff line
@@ -46,6 +46,8 @@ 
#define MCA_REG__STATUS__ERRORCODEEXT(x)	MCA_REG_FIELD(x, 21, 16)

#define MCA_REG__STATUS__ERRORCODE(x)		MCA_REG_FIELD(x, 15, 0)



#define MCA_REG__SYND__ERRORINFORMATION(x)	MCA_REG_FIELD(x, 17, 0)



enum amdgpu_mca_ip {

	AMDGPU_MCA_IP_UNKNOW = -1,

	AMDGPU_MCA_IP_PSP = 0,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

+8 −1
Original line number Diff line number Diff line
@@ -2593,13 +2593,20 @@ static bool mca_gfx_smu_bank_is_valid(const struct mca_ras_info *mca_ras, struct 
static bool mca_smu_bank_is_valid(const struct mca_ras_info *mca_ras, struct amdgpu_device *adev,

				  enum amdgpu_mca_error_type type, struct mca_bank_entry *entry)

{

	struct smu_context *smu = adev->powerplay.pp_handle;

	uint32_t errcode, instlo;



	instlo = REG_GET_FIELD(entry->regs[MCA_REG_IDX_IPID], MCMP1_IPIDT0, InstanceIdLo);

	if (instlo != 0x03b30400)

		return false;



	if (!(adev->flags & AMD_IS_APU) && smu->smc_fw_version >= 0x00555600) {

		errcode = MCA_REG__SYND__ERRORINFORMATION(entry->regs[MCA_REG_IDX_SYND]);

		errcode &= 0xff;

	} else {

		errcode = REG_GET_FIELD(entry->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);

	}



	return mca_smu_check_error_code(adev, mca_ras, errcode);

}