Commit 37e328a1 authored by Ben Skeggs's avatar Ben Skeggs Committed by Dave Airlie
Browse files

drm/nouveau/gsp/r535: add support for rm alloc 



Adds the plumbing to be able to allocate and free RM objects, and
implements RM client/device/subdevice allocation with it.

These will be used by subsequent patches.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-35-skeggsb@gmail.com
parent 4cf2c83e

drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h

+131 −0
Original line number Diff line number Diff line
@@ -158,7 +158,24 @@ struct nvkm_gsp { 
		void *(*rm_ctrl_get)(struct nvkm_gsp_object *, u32 cmd, u32 argc);

		void *(*rm_ctrl_push)(struct nvkm_gsp_object *, void *argv, u32 repc);

		void (*rm_ctrl_done)(struct nvkm_gsp_object *, void *repv);



		void *(*rm_alloc_get)(struct nvkm_gsp_object *, u32 oclass, u32 argc);

		void *(*rm_alloc_push)(struct nvkm_gsp_object *, void *argv, u32 repc);

		void (*rm_alloc_done)(struct nvkm_gsp_object *, void *repv);



		int (*rm_free)(struct nvkm_gsp_object *);



		int (*client_ctor)(struct nvkm_gsp *, struct nvkm_gsp_client *);

		void (*client_dtor)(struct nvkm_gsp_client *);



		int (*device_ctor)(struct nvkm_gsp_client *, struct nvkm_gsp_device *);

		void (*device_dtor)(struct nvkm_gsp_device *);

	} *rm;



	struct {

		struct mutex mutex;;

		struct idr idr;

	} client_id;

};



static inline bool
@@ -247,6 +264,120 @@ nvkm_gsp_rm_ctrl_done(struct nvkm_gsp_object *object, void *repv) 
	object->client->gsp->rm->rm_ctrl_done(object, repv);

}



static inline void *

nvkm_gsp_rm_alloc_get(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u32 argc,

		      struct nvkm_gsp_object *object)

{

	struct nvkm_gsp_client *client = parent->client;

	struct nvkm_gsp *gsp = client->gsp;

	void *argv;



	object->client = parent->client;

	object->parent = parent;

	object->handle = handle;



	argv = gsp->rm->rm_alloc_get(object, oclass, argc);

	if (IS_ERR_OR_NULL(argv)) {

		object->client = NULL;

		return argv;

	}



	return argv;

}



static inline void *

nvkm_gsp_rm_alloc_push(struct nvkm_gsp_object *object, void *argv, u32 repc)

{

	void *repv = object->client->gsp->rm->rm_alloc_push(object, argv, repc);



	if (IS_ERR(repv))

		object->client = NULL;



	return repv;

}



static inline int

nvkm_gsp_rm_alloc_wr(struct nvkm_gsp_object *object, void *argv)

{

	void *repv = nvkm_gsp_rm_alloc_push(object, argv, 0);



	if (IS_ERR(repv))

		return PTR_ERR(repv);



	return 0;

}



static inline void

nvkm_gsp_rm_alloc_done(struct nvkm_gsp_object *object, void *repv)

{

	object->client->gsp->rm->rm_alloc_done(object, repv);

}



static inline int

nvkm_gsp_rm_alloc(struct nvkm_gsp_object *parent, u32 handle, u32 oclass, u32 argc,

		  struct nvkm_gsp_object *object)

{

	void *argv = nvkm_gsp_rm_alloc_get(parent, handle, oclass, argc, object);



	if (IS_ERR_OR_NULL(argv))

		return argv ? PTR_ERR(argv) : -EIO;



	return nvkm_gsp_rm_alloc_wr(object, argv);

}



static inline int

nvkm_gsp_rm_free(struct nvkm_gsp_object *object)

{

	if (object->client)

		return object->client->gsp->rm->rm_free(object);



	return 0;

}



static inline int

nvkm_gsp_client_ctor(struct nvkm_gsp *gsp, struct nvkm_gsp_client *client)

{

	if (WARN_ON(!gsp->rm))

		return -ENOSYS;



	return gsp->rm->client_ctor(gsp, client);

}



static inline void

nvkm_gsp_client_dtor(struct nvkm_gsp_client *client)

{

	if (client->gsp)

		client->gsp->rm->client_dtor(client);

}



static inline int

nvkm_gsp_device_ctor(struct nvkm_gsp_client *client, struct nvkm_gsp_device *device)

{

	return client->gsp->rm->device_ctor(client, device);

}



static inline void

nvkm_gsp_device_dtor(struct nvkm_gsp_device *device)

{

	if (device->object.client)

		device->object.client->gsp->rm->device_dtor(device);

}



static inline int

nvkm_gsp_client_device_ctor(struct nvkm_gsp *gsp,

			    struct nvkm_gsp_client *client, struct nvkm_gsp_device *device)

{

	int ret = nvkm_gsp_client_ctor(gsp, client);



	if (ret == 0) {

		ret = nvkm_gsp_device_ctor(client, device);

		if (ret)

			nvkm_gsp_client_dtor(client);

	}



	return ret;

}



int gv100_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);

int tu102_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);

int tu116_gsp_new(struct nvkm_device *, enum nvkm_subdev_type, int, struct nvkm_gsp **);

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl0000.h

0 → 100644
+38 −0
Original line number Diff line number Diff line 
#ifndef __src_common_sdk_nvidia_inc_class_cl0000_h__

#define __src_common_sdk_nvidia_inc_class_cl0000_h__

#include <nvrm/535.54.03/common/sdk/nvidia/inc/nvlimits.h>



/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */



/*

 * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

 * SPDX-License-Identifier: MIT

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#define NV01_ROOT        (0x0U) /* finn: Evaluated from "NV0000_ALLOC_PARAMETERS_MESSAGE_ID" */



typedef struct NV0000_ALLOC_PARAMETERS {

    NvHandle hClient; /* CORERM-2934: hClient must remain the first member until all allocations use these params */

    NvU32    processID;

    char     processName[NV_PROC_NAME_MAX_LENGTH];

} NV0000_ALLOC_PARAMETERS;



#endif

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl0080.h

0 → 100644
+43 −0
Original line number Diff line number Diff line 
#ifndef __src_common_sdk_nvidia_inc_class_cl0080_h__

#define __src_common_sdk_nvidia_inc_class_cl0080_h__



/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */



/*

 * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

 * SPDX-License-Identifier: MIT

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#define NV01_DEVICE_0      (0x80U) /* finn: Evaluated from "NV0080_ALLOC_PARAMETERS_MESSAGE_ID" */



typedef struct NV0080_ALLOC_PARAMETERS {

    NvU32    deviceId;

    NvHandle hClientShare;

    NvHandle hTargetClient;

    NvHandle hTargetDevice;

    NvV32    flags;

    NV_DECLARE_ALIGNED(NvU64 vaSpaceSize, 8);

    NV_DECLARE_ALIGNED(NvU64 vaStartInternal, 8);

    NV_DECLARE_ALIGNED(NvU64 vaLimitInternal, 8);

    NvV32    vaMode;

} NV0080_ALLOC_PARAMETERS;



#endif

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/class/cl2080.h

0 → 100644
+35 −0
Original line number Diff line number Diff line 
#ifndef __src_common_sdk_nvidia_inc_class_cl2080_h__

#define __src_common_sdk_nvidia_inc_class_cl2080_h__



/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */



/*

 * SPDX-FileCopyrightText: Copyright (c) 2002-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

 * SPDX-License-Identifier: MIT

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#define NV20_SUBDEVICE_0      (0x2080U) /* finn: Evaluated from "NV2080_ALLOC_PARAMETERS_MESSAGE_ID" */



typedef struct NV2080_ALLOC_PARAMETERS {

    NvU32 subDeviceId;

} NV2080_ALLOC_PARAMETERS;



#endif

drivers/gpu/drm/nouveau/include/nvrm/535.54.03/common/sdk/nvidia/inc/nvlimits.h

0 → 100644
+31 −0
Original line number Diff line number Diff line 
#ifndef __src_common_sdk_nvidia_inc_nvlimits_h__

#define __src_common_sdk_nvidia_inc_nvlimits_h__



/* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */



/*

 * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

 * SPDX-License-Identifier: MIT

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 */



#define NV_PROC_NAME_MAX_LENGTH 100U



#endif