Commit 381ec816 authored by Tim Huang's avatar Tim Huang Committed by Alex Deucher
Browse files

drm/amdgpu: check return for setting engine dram timings 



This resolves the unchecded return value warning reported by Coverity.

Signed-off-by: default avatarTim Huang <tim.huang@amd.com>
Reviewed-by: default avatarJesse Zhang <jesse.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5839d27d

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

+4 −4
Original line number Diff line number Diff line
@@ -1145,7 +1145,7 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev, 
	return 0;

}



void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

int amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

					    u32 eng_clock, u32 mem_clock)

{

	SET_ENGINE_CLOCK_PS_ALLOCATION args;
@@ -1161,8 +1161,8 @@ void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev, 
	if (mem_clock)

		args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK);



	amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args,

		sizeof(args));

	return amdgpu_atom_execute_table(adev->mode_info.atom_context, index,

					 (uint32_t *)&args, sizeof(args));

}



void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h

+2 −2
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev, 
					    bool strobe_mode,

					    struct atom_mpll_param *mpll_param);



void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

int amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,

					    u32 eng_clock, u32 mem_clock);



bool

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

+5 −3
Original line number Diff line number Diff line
@@ -4755,13 +4755,15 @@ static int si_populate_memory_timing_parameters(struct amdgpu_device *adev, 
	u32 dram_timing;

	u32 dram_timing2;

	u32 burst_time;

	int ret;



	arb_regs->mc_arb_rfsh_rate =

		(u8)si_calculate_memory_refresh_rate(adev, pl->sclk);



	amdgpu_atombios_set_engine_dram_timings(adev,

					    pl->sclk,

	ret = amdgpu_atombios_set_engine_dram_timings(adev, pl->sclk,

						      pl->mclk);

	if (ret)

		return ret;



	dram_timing  = RREG32(MC_ARB_DRAM_TIMING);

	dram_timing2 = RREG32(MC_ARB_DRAM_TIMING2);