Commit 38506cb7 authored by Dikshita Agarwal's avatar Dikshita Agarwal Committed by Hans Verkuil
Browse files

media: iris: add platform driver for iris video device 



In preparation for adding H264 decode functionality, add the probe and
remove functions and platform data to initialize iris resources, which
are clocks, interconnects, power domains, reset clocks, and clock
frequencies used for the iris hardware.

Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: default avatarHans Verkuil <hverkuil@xs4all.nl>
Tested-by: Stefan Schmidt <stefan.schmidt@linaro.org> # x1e80100 (Dell XPS 13 9345)
Reviewed-by: default avatarStefan Schmidt <stefan.schmidt@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
Signed-off-by: default avatarDikshita Agarwal <quic_dikshita@quicinc.com>
Signed-off-by: default avatarHans Verkuil <hverkuil@xs4all.nl>
parent f0694355

drivers/media/platform/qcom/Kconfig

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comment "Qualcomm media platform drivers"



source "drivers/media/platform/qcom/camss/Kconfig"

source "drivers/media/platform/qcom/iris/Kconfig"

source "drivers/media/platform/qcom/venus/Kconfig"

drivers/media/platform/qcom/Makefile

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# SPDX-License-Identifier: GPL-2.0-only

obj-y += camss/

obj-y += iris/

obj-y += venus/

drivers/media/platform/qcom/iris/Kconfig

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config VIDEO_QCOM_IRIS

        tristate "Qualcomm iris V4L2 decoder driver"

        depends on VIDEO_DEV

        depends on ARCH_QCOM || COMPILE_TEST

        help

          This is a V4L2 driver for Qualcomm iris video accelerator

          hardware. It accelerates decoding operations on various

          Qualcomm SoCs.

          To compile this driver as a module choose m here.

drivers/media/platform/qcom/iris/Makefile

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iris-objs += iris_platform_sm8550.o \

             iris_probe.o \



obj-$(CONFIG_VIDEO_QCOM_IRIS) += iris.o

drivers/media/platform/qcom/iris/iris_core.h

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/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.

 */



#ifndef __IRIS_CORE_H__

#define __IRIS_CORE_H__



#include <linux/types.h>

#include <media/v4l2-device.h>



#include "iris_platform_common.h"



struct icc_info {

	const char		*name;

	u32			bw_min_kbps;

	u32			bw_max_kbps;

};



/**

 * struct iris_core - holds core parameters valid for all instances

 *

 * @dev: reference to device structure

 * @reg_base: IO memory base address

 * @irq: iris irq

 * @v4l2_dev: a holder for v4l2 device structure

 * @vdev_dec: iris video device structure for decoder

 * @icc_tbl: table of iris interconnects

 * @icc_count: count of iris interconnects

 * @pmdomain_tbl: table of iris power domains

 * @opp_pmdomain_tbl: table of opp power domains

 * @clock_tbl: table of iris clocks

 * @clk_count: count of iris clocks

 * @resets: table of iris reset clocks

 * @iris_platform_data: a structure for platform data

 */



struct iris_core {

	struct device				*dev;

	void __iomem				*reg_base;

	int					irq;

	struct v4l2_device			v4l2_dev;

	struct video_device			*vdev_dec;

	struct icc_bulk_data			*icc_tbl;

	u32					icc_count;

	struct dev_pm_domain_list		*pmdomain_tbl;

	struct dev_pm_domain_list		*opp_pmdomain_tbl;

	struct clk_bulk_data			*clock_tbl;

	u32					clk_count;

	struct reset_control_bulk_data		*resets;

	const struct iris_platform_data		*iris_platform_data;

};



#endif