Commit 3854887b authored by Rodrigo Siqueira's avatar Rodrigo Siqueira Committed by Alex Deucher
Browse files

drm/amd/display: Remove unnecessary code 



This commit groups many parts of the code that are redundant or not used
and drops all of them.

Reviewed-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 71866b72

drivers/gpu/drm/amd/display/dc/dc.h

+0 −1
Original line number Diff line number Diff line
@@ -1006,7 +1006,6 @@ struct dc_debug_options { 
	unsigned int force_cositing;

};



struct gpu_info_soc_bounding_box_v1_0;



/* Generic structure that can be used to query properties of DC. More fields

 * can be added as required.

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

+0 −3
Original line number Diff line number Diff line
@@ -312,9 +312,6 @@ static bool setup_engine( 
	/* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/

	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1);



	/* we have checked I2c not used by DMCU, set SW use I2C REQ to 1 to indicate SW using it*/

	REG_UPDATE(DC_I2C_ARBITRATION, DC_I2C_SW_USE_I2C_REG_REQ, 1);



	/*set SW requested I2c speed to default, if API calls in it will be override later*/

	set_speed(dce_i2c_hw, dce_i2c_hw->ctx->dc->caps.i2c_speed_in_khz);

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h

+0 −6
Original line number Diff line number Diff line
@@ -167,7 +167,6 @@ struct dcn10_link_enc_registers { 
	uint32_t DIO_LINKD_CNTL;

	uint32_t DIO_LINKE_CNTL;

	uint32_t DIO_LINKF_CNTL;

	uint32_t DIG_FIFO_CTRL0;

	uint32_t DIO_CLK_CNTL;

	uint32_t DIG_BE_CLK_CNTL;

};
@@ -475,9 +474,6 @@ struct dcn10_link_enc_registers { 
	type HPO_DP_ENC_SEL;\

	type HPO_HDMI_ENC_SEL



#define DCN32_LINK_ENCODER_REG_FIELD_LIST(type) \

	type DIG_FIFO_OUTPUT_PIXEL_MODE



#define DCN35_LINK_ENCODER_REG_FIELD_LIST(type) \

	type DIG_BE_ENABLE;\

	type DIG_RB_SWITCH_EN;\
@@ -512,7 +508,6 @@ struct dcn10_link_enc_shift { 
	DCN20_LINK_ENCODER_REG_FIELD_LIST(uint8_t);

	DCN30_LINK_ENCODER_REG_FIELD_LIST(uint8_t);

	DCN31_LINK_ENCODER_REG_FIELD_LIST(uint8_t);

	DCN32_LINK_ENCODER_REG_FIELD_LIST(uint8_t);

	DCN35_LINK_ENCODER_REG_FIELD_LIST(uint8_t);

};
@@ -521,7 +516,6 @@ struct dcn10_link_enc_mask { 
	DCN20_LINK_ENCODER_REG_FIELD_LIST(uint32_t);

	DCN30_LINK_ENCODER_REG_FIELD_LIST(uint32_t);

	DCN31_LINK_ENCODER_REG_FIELD_LIST(uint32_t);

	DCN32_LINK_ENCODER_REG_FIELD_LIST(uint32_t);

	DCN35_LINK_ENCODER_REG_FIELD_LIST(uint32_t);

};

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h

+0 −18
Original line number Diff line number Diff line
@@ -29,13 +29,6 @@ 
#include "dcn20/dcn20_dccg.h"





#define DCCG_REG_LIST_DCN3AG() \

	DCCG_COMMON_REG_LIST_DCN_BASE(),\

	SR(PHYASYMCLK_CLOCK_CNTL),\

	SR(PHYBSYMCLK_CLOCK_CNTL),\

	SR(PHYCSYMCLK_CLOCK_CNTL)





#define DCCG_REG_LIST_DCN30() \

	DCCG_REG_LIST_DCN2(),\

	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
@@ -46,17 +39,6 @@ 
	SR(PHYBSYMCLK_CLOCK_CNTL),\

	SR(PHYCSYMCLK_CLOCK_CNTL)



#define DCCG_MASK_SH_LIST_DCN3AG(mask_sh) \

	DCCG_MASK_SH_LIST_DCN2_1(mask_sh),\

	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_EN, mask_sh),\

	DCCG_SF(HDMICHARCLK0_CLOCK_CNTL, HDMICHARCLK0_SRC_SEL, mask_sh),\

	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\

	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\

	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_EN, mask_sh),\

	DCCG_SF(PHYBSYMCLK_CLOCK_CNTL, PHYBSYMCLK_FORCE_SRC_SEL, mask_sh),\

	DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_EN, mask_sh),\

	DCCG_SF(PHYCSYMCLK_CLOCK_CNTL, PHYCSYMCLK_FORCE_SRC_SEL, mask_sh)



#define DCCG_MASK_SH_LIST_DCN3(mask_sh) \

	DCCG_MASK_SH_LIST_DCN2(mask_sh),\

	DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c

+0 −2
Original line number Diff line number Diff line
@@ -251,9 +251,7 @@ static const struct dwbc_funcs dcn30_dwbc_funcs = { 
	.set_fc_enable		= dwb3_set_fc_enable,

	.set_stereo		= dwb3_set_stereo,

	.set_new_content	= dwb3_set_new_content,

	.dwb_program_output_csc	= NULL,

	.dwb_ogam_set_input_transfer_func	= dwb3_ogam_set_input_transfer_func, //TODO: rename

	.dwb_set_scaler		= NULL,

};



void dcn30_dwbc_construct(struct dcn30_dwbc *dwbc30,