Commit 387bef82 authored by Jianbo Liu's avatar Jianbo Liu Committed by Leon Romanovsky
Browse files

net/mlx5: Update mlx5_ifc to support FEC for 200G per lane link modes 



Add FEC admin and override related fields in PPLM, and the bit in PCAM
to indicate those fields are supported.

Signed-off-by: default avatarJianbo Liu <jianbol@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250109204231.1809851-2-tariqt@nvidia.com


Reviewed-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Reviewed-by: default avatarKalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent aeb3ec99

include/linux/mlx5/mlx5_ifc.h

+18 −2
Original line number Diff line number Diff line
@@ -10150,7 +10150,21 @@ struct mlx5_ifc_pplm_reg_bits { 
	u8         fec_override_admin_200g_2x[0x10];

	u8         fec_override_admin_100g_1x[0x10];



	u8         reserved_at_260[0x20];

	u8         reserved_at_260[0x60];



	u8         fec_override_cap_1600g_8x[0x10];

	u8         fec_override_cap_800g_4x[0x10];



	u8         fec_override_cap_400g_2x[0x10];

	u8         fec_override_cap_200g_1x[0x10];



	u8         fec_override_admin_1600g_8x[0x10];

	u8         fec_override_admin_800g_4x[0x10];



	u8         fec_override_admin_400g_2x[0x10];

	u8         fec_override_admin_200g_1x[0x10];



	u8         reserved_at_340[0x80];

};



struct mlx5_ifc_ppcnt_reg_bits {
@@ -10524,7 +10538,9 @@ struct mlx5_ifc_mtutc_reg_bits { 
};



struct mlx5_ifc_pcam_enhanced_features_bits {

	u8         reserved_at_0[0x48];

	u8         reserved_at_0[0x1d];

	u8         fec_200G_per_lane_in_pplm[0x1];

	u8         reserved_at_1e[0x2a];

	u8         fec_100G_per_lane_in_pplm[0x1];

	u8         reserved_at_49[0x1f];

	u8         fec_50G_per_lane_in_pplm[0x1];