Commit 38f28cfe authored by Yi Yang's avatar Yi Yang Committed by Greg Kroah-Hartman
Browse files

serial: tegra: Add missing clk_disable_unprepare() in tegra_uart_hw_init() 



Add the missing clk_disable_unprepare() before return from
tegra_uart_hw_init() in the error handling path.
When request_irq() fails in tegra_uart_startup(), 'tup->uart_clk'
has been enabled, fix it by adding clk_disable_unprepare().

Fixes: cc9ca4d9 ("serial: tegra: Only print FIFO error message when an error occurs")
Fixes: d781ec21 ("serial: tegra: report clk rate errors")
Signed-off-by: default avatarYi Yang <yiyang13@huawei.com>
Link: https://lore.kernel.org/r/20221126020852.113378-1-yiyang13@huawei.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c8f71b49

drivers/tty/serial/serial-tegra.c

+6 −1
Original line number Diff line number Diff line
@@ -1046,6 +1046,7 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) 
	if (tup->cdata->fifo_mode_enable_status) {

		ret = tegra_uart_wait_fifo_mode_enabled(tup);

		if (ret < 0) {

			clk_disable_unprepare(tup->uart_clk);

			dev_err(tup->uport.dev,

				"Failed to enable FIFO mode: %d\n", ret);

			return ret;
@@ -1067,6 +1068,7 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup) 
	 */

	ret = tegra_set_baudrate(tup, TEGRA_UART_DEFAULT_BAUD);

	if (ret < 0) {

		clk_disable_unprepare(tup->uart_clk);

		dev_err(tup->uport.dev, "Failed to set baud rate\n");

		return ret;

	}
@@ -1226,10 +1228,13 @@ static int tegra_uart_startup(struct uart_port *u) 
				dev_name(u->dev), tup);

	if (ret < 0) {

		dev_err(u->dev, "Failed to register ISR for IRQ %d\n", u->irq);

		goto fail_hw_init;

		goto fail_request_irq;

	}

	return 0;



fail_request_irq:

	/* tup->uart_clk is already enabled in tegra_uart_hw_init */

	clk_disable_unprepare(tup->uart_clk);

fail_hw_init:

	if (!tup->use_rx_pio)

		tegra_uart_dma_channel_free(tup, true);