Commit 38f5265e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'spi-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 

Pull spi updates from Mark Brown:
 "This is a fairly quiet release for the most part, though we do have
  one really nice improvement in the spi-mem framework which will
  improve performance for flash devices especially when built on by
  changes in the MTD subsystem which are also due to be sent this merge
  window.

  There's also been some substantial work on some of the drivers,
  highlights include:

   - Support for per-operation bus frequency in the spi-mem framework,
     meaning speeds are no longer limited by the slowest operation

   - ACPI support and improved power management for Rockchip SFC
     controllers

   - Support for Atmel SAM7G5 QuadSPI and KEBA SPI controllers"

* tag 'spi-v6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (49 commits)
  spi: pxa2xx: Introduce __lpss_ssp_update_priv() helper
  spi: ti-qspi: Use syscon_regmap_lookup_by_phandle_args
  spi: amd: Fix -Wuninitialized in amd_spi_exec_mem_op()
  spi: spi-mem: Estimate the time taken by operations
  spi: spi-mem: Create macros for DTR operation
  spi: spi-mem: Reorder spi-mem macro assignments
  spi: zynqmp-gqspi: Support per spi-mem operation frequency switches
  spi: zynq-qspi: Support per spi-mem operation frequency switches
  spi: spi-ti-qspi: Support per spi-mem operation frequency switches
  spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches
  spi: rockchip-sfc: Support per spi-mem operation frequency switches
  spi: nxp-fspi: Support per spi-mem operation frequency switches
  spi: mxic: Support per spi-mem operation frequency switches
  spi: mt65xx: Support per spi-mem operation frequency switches
  spi: microchip-core-qspi: Support per spi-mem operation frequency switches
  spi: fsl-qspi: Support per spi-mem operation frequency switches
  spi: dw: Support per spi-mem operation frequency switches
  spi: cadence-qspi: Support per spi-mem operation frequency switches
  spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches
  spi: amd: Drop redundant check
  ...
parents 7b081a74 78b435c9

Documentation/devicetree/bindings/misc/lwn,bk4-spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/misc/lwn,bk4-spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Liebherr's BK4 external SPI controller



maintainers:

  - Lukasz Majewski <lukma@denx.de>



description: |

  Liebherr's BK4 external SPI controller is a device which handles data

  acquisition from compatible industrial peripherals.

  The SPI is used for data and management purposes in both master and

  slave modes.



allOf:

  - $ref: /schemas/spi/spi-peripheral-props.yaml#



properties:

  compatible:

    const: lwn,bk4-spi



  reg:

    maxItems: 1



  spi-max-frequency:

    maximum: 30000000



  fsl,spi-cs-sck-delay: true



  fsl,spi-sck-cs-delay: true



required:

  - compatible

  - spi-max-frequency



additionalProperties: false



examples:

  - |

    spi {

        #address-cells = <1>;

        #size-cells = <0>;



        spidev@0 {

            compatible = "lwn,bk4-spi";

            reg = <0>;

            spi-max-frequency = <30000000>;

            fsl,spi-cs-sck-delay = <200>;

            fsl,spi-sck-cs-delay = <400>;

        };

    };

Documentation/devicetree/bindings/misc/lwn-bk4.txt

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* Liebherr's BK4 controller external SPI



A device which handles data acquisition from compatible industrial

peripherals.

The SPI is used for data and management purposes in both master and

slave modes.



Required properties:



- compatible : Should be "lwn,bk4"



Required SPI properties:



- reg : Should be address of the device chip select within

  the controller.



- spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be

  30MHz at most for the Liebherr's BK4 external bus.



Example:



spidev0: spi@0 {

	compatible = "lwn,bk4";

	spi-max-frequency = <30000000>;

	reg = <0>;

};

Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

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@@ -68,6 +68,7 @@ properties: 
      - items:

          - enum:

              - amd,pensando-elba-qspi

              - amd,versal2-ospi

              - intel,lgm-qspi

              - intel,socfpga-qspi

              - mobileye,eyeq5-ospi

Documentation/devicetree/bindings/spi/spi-controller.yaml

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@@ -69,6 +69,11 @@ properties: 
         Should be generally avoided and be replaced by

         spi-cs-high + ACTIVE_HIGH.



      The simplest way to obtain an active-high CS signal is to configure the

      controller's cs-gpio property with the ACTIVE_HIGH flag and set the

      peripheral's spi-cs-high property. See example below for a better

      understanding.



  fifo-depth:

    $ref: /schemas/types.yaml#/definitions/uint32

    description:
@@ -189,3 +194,23 @@ examples: 
            stacked-memories = /bits/ 64 <0x10000000 0x10000000>;

        };

    };



  - |

    #include <dt-bindings/gpio/gpio.h>



    spi@20204000 {

        #address-cells = <1>;

        #size-cells = <0>;

        compatible = "brcm,bcm2835-spi";

        reg = <0x7e204000 0x1000>;

        interrupts = <2 22>;

        clocks = <&clk_spi>;

        cs-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;



        display@0 {

            compatible = "lg,lg4573";

            spi-max-frequency = <1000000>;

            reg = <0>;

            spi-cs-high;

        };

    };

drivers/mtd/nand/spi/core.c

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@@ -1214,6 +1214,8 @@ spinand_select_op_variant(struct spinand_device *spinand, 
			if (ret)

				break;



			spi_mem_adjust_op_freq(spinand->spimem, &op);



			if (!spi_mem_supports_op(spinand->spimem, &op))

				break;