Commit 39118392 authored by Shubhrajyoti Datta's avatar Shubhrajyoti Datta Committed by Stephen Boyd
Browse files

dt-bindings: Remove alt_ref from versal 



The alt_ref is present only in Versal-net devices.
Other versal devices do not have it. So remove alt_ref
for versal.

Fixes: 35254680 ("dt-bindings: clock: Add bindings for versal clock driver")
Signed-off-by: default avatarShubhrajyoti Datta <shubhrajyoti.datta@amd.com>

Link: https://lore.kernel.org/r/20231128104348.16372-1-shubhrajyoti.datta@amd.com


Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent b85ea95d

Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml

+25 −6
Original line number Diff line number Diff line
@@ -31,11 +31,11 @@ properties: 
  clocks:

    description: List of clock specifiers which are external input

      clocks to the given clock controller.

    minItems: 3

    minItems: 2

    maxItems: 8



  clock-names:

    minItems: 3

    minItems: 2

    maxItems: 8



required:
@@ -59,15 +59,34 @@ allOf: 
        clocks:

          items:

            - description: reference clock

            - description: alternate reference clock

            - description: alternate reference clock for programmable logic



        clock-names:

          items:

            - const: ref

            - const: alt_ref

            - const: pl_alt_ref



  - if:

      properties:

        compatible:

          contains:

            enum:

              - xlnx,versal-net-clk



    then:

      properties:

        clocks:

          items:

            - description: reference clock

            - description: alternate reference clock for programmable logic

            - description: alternate reference clock



        clock-names:

          items:

            - const: ref

            - const: pl_alt_ref

            - const: alt_ref



  - if:

      properties:

        compatible:
@@ -110,8 +129,8 @@ examples: 
        versal_clk: clock-controller {

          #clock-cells = <1>;

          compatible = "xlnx,versal-clk";

          clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>;

          clock-names = "ref", "alt_ref", "pl_alt_ref";

          clocks = <&ref>,  <&pl_alt_ref>;

          clock-names = "ref", "pl_alt_ref";

        };

      };

    };

Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml

+2 −2
Original line number Diff line number Diff line
@@ -95,8 +95,8 @@ examples: 
      versal_clk: clock-controller {

        #clock-cells = <1>;

        compatible = "xlnx,versal-clk";

        clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>;

        clock-names = "ref", "alt_ref", "pl_alt_ref";

        clocks = <&ref>, <&pl_alt_ref>;

        clock-names = "ref", "pl_alt_ref";

      };

    };