Commit 39195990 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

PCI: Correct PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 value 



fb82437f ("PCI: Change capability register offsets to hex") incorrectly
converted the PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 value from decimal 52 to hex
0x32:

  -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52      /* v2 endpoints with link end here */
  +#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 0x32    /* end of v2 EPs w/ link */

This broke PCI capabilities in a VMM because subsequent ones weren't
DWORD-aligned.

Change PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 to the correct value of 0x34.

fb82437f was from Baruch Siach <baruch@tkos.co.il>, but this was not
Baruch's fault; it's a mistake I made when applying the patch.

Fixes: fb82437f ("PCI: Change capability register offsets to hex")
Reported-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
Closes: https://lore.kernel.org/all/3ae392a0158e9d9ab09a1d42150429dd8ca42791.camel@infradead.org


Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
parent c22533c6

include/uapi/linux/pci_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -712,7 +712,7 @@ 
#define  PCI_EXP_LNKCTL2_HASD		0x0020 /* HW Autonomous Speed Disable */

#define PCI_EXP_LNKSTA2		0x32	/* Link Status 2 */

#define  PCI_EXP_LNKSTA2_FLIT		0x0400 /* Flit Mode Status */

#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2	0x32	/* end of v2 EPs w/ link */

#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2	0x34	/* end of v2 EPs w/ link */

#define PCI_EXP_SLTCAP2		0x34	/* Slot Capabilities 2 */

#define  PCI_EXP_SLTCAP2_IBPD	0x00000001 /* In-band PD Disable Supported */

#define PCI_EXP_SLTCTL2		0x38	/* Slot Control 2 */