Commit 3a161017 authored by Marcel Ziswiler's avatar Marcel Ziswiler Committed by Vinod Koul
Browse files

phy: freescale: imx8m-pcie: fix pcie link-up instability 



Leaving AUX_PLL_REFCLK_SEL at its reset default of AUX_IN (PLL clock)
proves to be more stable on the i.MX 8M Mini.

Fixes: 1aa97b00 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")

Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: default avatarRichard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20240322130646.1016630-2-marcel@ziswiler.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 62720770

drivers/phy/freescale/phy-fsl-imx8m-pcie.c

+4 −2
Original line number Diff line number Diff line
@@ -110,8 +110,10 @@ static int imx8_pcie_phy_power_on(struct phy *phy) 
		/* Source clock from SoC internal PLL */

		writel(ANA_PLL_CLK_OUT_TO_EXT_IO_SEL,

		       imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG062);

		if (imx8_phy->drvdata->variant != IMX8MM) {

			writel(AUX_PLL_REFCLK_SEL_SYS_PLL,

			       imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063);

		}

		val = ANA_AUX_RX_TX_SEL_TX | ANA_AUX_TX_TERM;

		writel(val | ANA_AUX_RX_TERM_GND_EN,

		       imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG064);