Commit 3ae8cef2 authored by Catalin Marinas's avatar Catalin Marinas
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Merge branches 'for-next/livepatch', 'for-next/user-contig-bbml2',... 

Merge branches 'for-next/livepatch', 'for-next/user-contig-bbml2', 'for-next/misc', 'for-next/acpi', 'for-next/debug-entry', 'for-next/feat_mte_tagged_far', 'for-next/kselftest', 'for-next/mdscr-cleanup' and 'for-next/vmap-stack', remote-tracking branch 'arm64/for-next/perf' into for-next/core

* arm64/for-next/perf: (23 commits)
  drivers/perf: hisi: Support PMUs with no interrupt
  drivers/perf: hisi: Relax the event number check of v2 PMUs
  drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver
  drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information
  drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
  drivers/perf: hisi: Simplify the probe process for each DDRC version
  perf/arm-ni: Support sharing IRQs within an NI instance
  perf/arm-ni: Consolidate CPU affinity handling
  perf/cxlpmu: Fix typos in cxl_pmu.c comments and documentation
  perf/cxlpmu: Remove unintended newline from IRQ name format string
  perf/cxlpmu: Fix devm_kcalloc() argument order in cxl_pmu_probe()
  perf: arm_spe: Relax period restriction
  perf: arm_pmuv3: Add support for the Branch Record Buffer Extension (BRBE)
  KVM: arm64: nvhe: Disable branch generation in nVHE guests
  arm64: Handle BRBE booting requirements
  arm64/sysreg: Add BRBE registers and fields
  perf/arm: Add missing .suppress_bind_attrs
  perf/arm-cmn: Reduce stack usage during discovery
  perf: imx9_perf: make the read-only array mask static const
  perf/arm-cmn: Broaden module description for wider interconnect support
  ...

* for-next/livepatch:
  : Support for HAVE_LIVEPATCH on arm64
  arm64: Kconfig: Keep selects somewhat alphabetically ordered
  arm64: Implement HAVE_LIVEPATCH
  arm64: stacktrace: Implement arch_stack_walk_reliable()
  arm64: stacktrace: Check kretprobe_find_ret_addr() return value
  arm64/module: Use text-poke API for late relocations.

* for-next/user-contig-bbml2:
  : Optimise the TLBI when folding/unfolding contigous PTEs on hardware with BBML2 and no TLB conflict aborts
  arm64/mm: Elide tlbi in contpte_convert() under BBML2
  iommu/arm: Add BBM Level 2 smmu feature
  arm64: Add BBM Level 2 cpu feature
  arm64: cpufeature: Introduce MATCH_ALL_EARLY_CPUS capability type

* for-next/misc:
  : Miscellaneous arm64 patches
  arm64/gcs: task_gcs_el0_enable() should use passed task
  arm64: signal: Remove ISB when resetting POR_EL0
  arm64/mm: Drop redundant addr increment in set_huge_pte_at()
  arm64: Mark kernel as tainted on SAE and SError panic
  arm64/gcs: Don't call gcs_free() when releasing task_struct
  arm64: fix unnecessary rebuilding when CONFIG_DEBUG_EFI=y
  arm64/mm: Optimize loop to reduce redundant operations of contpte_ptep_get
  arm64: pi: use 'targets' instead of extra-y in Makefile

* for-next/acpi:
  : Various ACPI arm64 changes
  ACPI: Suppress misleading SPCR console message when SPCR table is absent
  ACPI: Return -ENODEV from acpi_parse_spcr() when SPCR support is disabled

* for-next/debug-entry:
  : Simplify the debug exception entry path
  arm64: debug: remove debug exception registration infrastructure
  arm64: debug: split bkpt32 exception entry
  arm64: debug: split brk64 exception entry
  arm64: debug: split hardware watchpoint exception entry
  arm64: debug: split single stepping exception entry
  arm64: debug: refactor reinstall_suspended_bps()
  arm64: debug: split hardware breakpoint exception entry
  arm64: entry: Add entry and exit functions for debug exceptions
  arm64: debug: remove break/step handler registration infrastructure
  arm64: debug: call step handlers statically
  arm64: debug: call software breakpoint handlers statically
  arm64: refactor aarch32_break_handler()
  arm64: debug: clean up single_step_handler logic

* for-next/feat_mte_tagged_far:
  : Support for reporting the non-address bits during a synchronous MTE tag check fault
  kselftest/arm64/mte: Add mtefar tests on check_mmap_options
  kselftest/arm64/mte: Refactor check_mmap_option test
  kselftest/arm64/mte: Add verification for address tag in signal handler
  kselftest/arm64/mte: Add address tag related macro and function
  kselftest/arm64/mte: Check MTE_FAR feature is supported
  kselftest/arm64/mte: Register mte signal handler with SA_EXPOSE_TAGBITS
  kselftest/arm64: Add MTE_FAR hwcap test
  KVM: arm64: Expose FEAT_MTE_TAGGED_FAR feature to guest
  arm64: Report address tag when FEAT_MTE_TAGGED_FAR is supported
  arm64/cpufeature: Add FEAT_MTE_TAGGED_FAR feature

* for-next/kselftest:
  : Kselftest updates for arm64
  kselftest/arm64: Handle attempts to disable SM on SME only systems
  kselftest/arm64: Fix SVE write data generation for SME only systems
  kselftest/arm64: Test SME on SME only systems in fp-ptrace
  kselftest/arm64: Test FPSIMD format data writes via NT_ARM_SVE in fp-ptrace
  kselftest/arm64: Allow sve-ptrace to run on SME only systems
  kselftest/arm4: Provide local defines for AT_HWCAP3
  kselftest/arm64: Specify SVE data when testing VL set in sve-ptrace
  kselftest/arm64: Fix test for streaming FPSIMD write in sve-ptrace
  kselftest/arm64: Fix check for setting new VLs in sve-ptrace
  kselftest/arm64: Convert tpidr2 test to use kselftest.h

* for-next/mdscr-cleanup:
  : Drop redundant DBG_MDSCR_* macros
  KVM: selftests: Change MDSCR_EL1 register holding variables as uint64_t
  arm64/debug: Drop redundant DBG_MDSCR_* macros

* for-next/vmap-stack:
  : Force VMAP_STACK on arm64
  arm64: remove CONFIG_VMAP_STACK checks from entry code
  arm64: remove CONFIG_VMAP_STACK checks from SDEI stack handling
  arm64: remove CONFIG_VMAP_STACK checks from stacktrace overflow logic
  arm64: remove CONFIG_VMAP_STACK conditionals from traps overflow stack
  arm64: remove CONFIG_VMAP_STACK conditionals from irq stack setup
  arm64: Remove CONFIG_VMAP_STACK conditionals from THREAD_SHIFT and THREAD_ALIGN
  arm64: efi: Remove CONFIG_VMAP_STACK check
  arm64: Mandate VMAP_STACK
  arm64: efi: Fix KASAN false positive for EFI runtime stack
  arm64/ptrace: Fix stack-out-of-bounds read in regs_get_kernel_stack_nth()
  arm64/gcs: Don't call gcs_free() during flush_gcs()
  arm64: Restrict pagetable teardown to avoid false warning
  docs: arm64: Fix ICC_SRE_EL2 register typo in booting.rst
parents e480898e 8e7a67ca 83bbd6be cbbcfb94 bad3fa2f a8b8cce9 d09674f9 4752dcc1 30ff3c98 9d1869f0

Documentation/arch/arm64/booting.rst

+1 −1
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ Before jumping into the kernel, the following conditions must be met: 


  - If the kernel is entered at EL1:



      - ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1

      - ICC_SRE_EL2.Enable (bit 3) must be initialised to 0b1

      - ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.



  - The DT or ACPI tables must describe a GICv3 interrupt controller.

Documentation/arch/arm64/elf_hwcaps.rst

+3 −0
Original line number Diff line number Diff line
@@ -435,6 +435,9 @@ HWCAP2_SME_SF8DP4 
HWCAP2_POE

    Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001.



HWCAP3_MTE_FAR

    Functionality implied by ID_AA64PFR2_EL1.MTEFAR == 0b0001.



4. Unused AT_HWCAP bits

-----------------------

Documentation/arch/arm64/tagged-pointers.rst

+6 −5
Original line number Diff line number Diff line
@@ -60,11 +60,12 @@ that signal handlers in applications making use of tags cannot rely 
on the tag information for user virtual addresses being maintained

in these fields unless the flag was set.



Due to architecture limitations, bits 63:60 of the fault address

are not preserved in response to synchronous tag check faults

(SEGV_MTESERR) even if SA_EXPOSE_TAGBITS was set. Applications should

treat the values of these bits as undefined in order to accommodate

future architecture revisions which may preserve the bits.

If FEAT_MTE_TAGGED_FAR (Armv8.9) is supported, bits 63:60 of the fault address

are preserved in response to synchronous tag check faults (SEGV_MTESERR)

otherwise not preserved even if SA_EXPOSE_TAGBITS was set.

Applications should interpret the values of these bits based on

the support for the HWCAP3_MTE_FAR. If the support is not present,

the values of these bits should be considered as undefined otherwise valid.



For signals raised in response to watchpoint debug exceptions, the

tag information will be preserved regardless of the SA_EXPOSE_TAGBITS

arch/arm64/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -234,6 +234,7 @@ config ARM64 
	select HAVE_HW_BREAKPOINT if PERF_EVENTS

	select HAVE_IOREMAP_PROT

	select HAVE_IRQ_TIME_ACCOUNTING

	select HAVE_LIVEPATCH

	select HAVE_MOD_ARCH_SPECIFIC

	select HAVE_NMI

	select HAVE_PERF_EVENTS
@@ -242,6 +243,7 @@ config ARM64 
	select HAVE_PERF_USER_STACK_DUMP

	select HAVE_PREEMPT_DYNAMIC_KEY

	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_RELIABLE_STACKTRACE

	select HAVE_POSIX_CPU_TIMERS_TASK_WORK

	select HAVE_FUNCTION_ARG_ACCESS_API

	select MMU_GATHER_RCU_TABLE_FREE
@@ -279,6 +281,7 @@ config ARM64 
	select HAVE_SOFTIRQ_ON_OWN_STACK

	select USER_STACKTRACE_SUPPORT

	select VDSO_GETRANDOM

	select VMAP_STACK

	help

	  ARM 64-bit (AArch64) Linux support.
@@ -2499,3 +2502,4 @@ source "drivers/acpi/Kconfig" 


source "arch/arm64/kvm/Kconfig"



source "kernel/livepatch/Kconfig"

arch/arm64/include/asm/assembler.h

+2 −2
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ 
	.macro	disable_step_tsk, flgs, tmp

	tbz	\flgs, #TIF_SINGLESTEP, 9990f

	mrs	\tmp, mdscr_el1

	bic	\tmp, \tmp, #DBG_MDSCR_SS

	bic	\tmp, \tmp, #MDSCR_EL1_SS

	msr	mdscr_el1, \tmp

	isb	// Take effect before a subsequent clear of DAIF.D

9990:
@@ -63,7 +63,7 @@ 
	.macro	enable_step_tsk, flgs, tmp

	tbz	\flgs, #TIF_SINGLESTEP, 9990f

	mrs	\tmp, mdscr_el1

	orr	\tmp, \tmp, #DBG_MDSCR_SS

	orr	\tmp, \tmp, #MDSCR_EL1_SS

	msr	mdscr_el1, \tmp

9990:

	.endm