Commit 3b4c0fbc authored by Prajna Rajendra Kumar's avatar Prajna Rajendra Kumar Committed by Mark Brown
Browse files

spi: dt-bindings: Add num-cs property for mpfs-spi 



The PolarFire SoC SPI "hard" controller supports eight CS lines, out of
which only one CS line is physically wired. The default value of
'num-cs' was never set and it did not didn't impose a maximum value.

To reflect this hardware limitation in the device tree, the binding
enforces that the 'num-cs' property cannot exceed 1 unless additional
CS lines are explicitly defined using GPIO descriptors.

Fixes: 2da18730 ("spi: add bindings for microchip mpfs spi")
Signed-off-by: default avatarPrajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-2-prajna.rajendrakumar@microchip.com


Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent f44b3730

Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml

+26 −3
Original line number Diff line number Diff line
@@ -13,9 +13,6 @@ description: 
maintainers:

  - Conor Dooley <conor.dooley@microchip.com>



allOf:

  - $ref: spi-controller.yaml#



properties:

  compatible:

    oneOf:
@@ -43,6 +40,32 @@ required: 
  - interrupts

  - clocks



allOf:

  - $ref: spi-controller.yaml#



  - if:

      properties:

        compatible:

          contains:

            const: microchip,mpfs-spi

    then:

      properties:

        num-cs:

          default: 1



  - if:

      properties:

        compatible:

          contains:

            const: microchip,mpfs-spi

      not:

        required:

          - cs-gpios

    then:

      properties:

        num-cs:

          maximum: 1



unevaluatedProperties: false



examples: