Commit 3b56d27b authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dsi: Document DSC related pclk_rate and hdisplay calculations 



Provide actual documentation for the pclk and hdisplay calculations in
the case of DSC compression being used.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/577534/
Link: https://lore.kernel.org/r/20240208-fd_document_dsc_pclk_rate-v4-1-56fe59d0a2e0@linaro.org
parent b0b621f4

drivers/gpu/drm/msm/dsi/dsi_host.c

+31 −2
Original line number Diff line number Diff line
@@ -519,6 +519,25 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host) 
	clk_disable_unprepare(msm_host->byte_clk);

}



/**

 * dsi_adjust_pclk_for_compression() - Adjust the pclk rate for compression case

 * @mode: The selected mode for the DSI output

 * @dsc: DRM DSC configuration for this DSI output

 *

 * Adjust the pclk rate by calculating a new hdisplay proportional to

 * the compression ratio such that:

 *     new_hdisplay = old_hdisplay * compressed_bpp / uncompressed_bpp

 *

 * Porches do not need to be adjusted:

 * - For VIDEO mode they are not compressed by DSC and are passed as is.

 * - For CMD mode there are no actual porches. Instead these fields

 *   currently represent the overhead to the image data transfer. As such, they

 *   are calculated for the final mode parameters (after the compression) and

 *   are not to be adjusted too.

 *

 *  FIXME: Reconsider this if/when CMD mode handling is rewritten to use

 *  transfer time and data overhead as a starting point of the calculations.

 */

static unsigned long dsi_adjust_pclk_for_compression(const struct drm_display_mode *mode,

		const struct drm_dsc_config *dsc)

{
@@ -941,8 +960,18 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) 
		if (ret)

			return;



		/* Divide the display by 3 but keep back/font porch and

		 * pulse width same

		/*

		 * DPU sends 3 bytes per pclk cycle to DSI. If widebus is

		 * enabled, bus width is extended to 6 bytes.

		 *

		 * Calculate the number of pclks needed to transmit one line of

		 * the compressed data.



		 * The back/font porch and pulse width are kept intact. For

		 * VIDEO mode they represent timing parameters rather than

		 * actual data transfer, see the documentation for

		 * dsi_adjust_pclk_for_compression(). For CMD mode they are

		 * unused anyway.

		 */

		h_total -= hdisplay;

		if (wide_bus_enabled && !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))