Commit 3b7270c7 authored by Quan Zhou's avatar Quan Zhou Committed by Anup Patel
Browse files

RISC-V: perf/kvm: Add reporting of interrupt events 



For `perf kvm stat` on the RISC-V, in order to avoid the
occurrence of `UNKNOWN` event names, interrupts should be
reported in addition to exceptions.

testing without patch:

Event name                    Samples  Sample%       Time(ns)
---------------------------  --------  --------  ------------
STORE_GUEST_PAGE_FAULT        1496461   53.00%    889612544
UNKNOWN                        887514   31.00%    272857968
LOAD_GUEST_PAGE_FAULT          305164   10.00%    189186331
VIRTUAL_INST_FAULT              70625    2.00%    134114260
SUPERVISOR_SYSCALL              32014    1.00%     58577110
INST_GUEST_PAGE_FAULT               1    0.00%         2545

testing with patch:

Event name                    Samples  Sample%       Time(ns)
---------------------------  --------  --------  ------------
IRQ_S_TIMER                   211271    58.00%  738298680600
EXC_STORE_GUEST_PAGE_FAULT    111279    30.00%  130725914800
EXC_LOAD_GUEST_PAGE_FAULT      22039     6.00%   25441480600
EXC_VIRTUAL_INST_FAULT          8913     2.00%   21015381600
IRQ_VS_EXT                      4748     1.00%   10155464300
IRQ_S_EXT                       2802     0.00%   13288775800
IRQ_S_SOFT                      1998     0.00%    4254129300

Signed-off-by: default avatarQuan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/9693132df4d0f857b8be3a75750c36b40213fcc0.1726211632.git.zhouquan@iscas.ac.cn


Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent f55ffaf8

tools/perf/arch/riscv/util/kvm-stat.c

+3 −3
Original line number Diff line number Diff line
@@ -9,10 +9,10 @@ 
#include <memory.h>

#include "../../../util/evsel.h"

#include "../../../util/kvm-stat.h"

#include "riscv_exception_types.h"

#include "riscv_trap_types.h"

#include "debug.h"



define_exit_reasons_table(riscv_exit_reasons, kvm_riscv_exception_class);

define_exit_reasons_table(riscv_exit_reasons, kvm_riscv_trap_class);



const char *vcpu_id_str = "id";

const char *kvm_exit_reason = "scause";
@@ -30,7 +30,7 @@ static void event_get_key(struct evsel *evsel, 
			  struct event_key *key)

{

	key->info = 0;

	key->key = evsel__intval(evsel, sample, kvm_exit_reason);

	key->key = evsel__intval(evsel, sample, kvm_exit_reason) & ~CAUSE_IRQ_FLAG;

	key->exit_reasons = riscv_exit_reasons;

}

tools/perf/arch/riscv/util/riscv_exception_types.h→tools/perf/arch/riscv/util/riscv_trap_types.h

+57 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

#ifndef ARCH_PERF_RISCV_EXCEPTION_TYPES_H

#define ARCH_PERF_RISCV_EXCEPTION_TYPES_H

#ifndef ARCH_PERF_RISCV_TRAP_TYPES_H

#define ARCH_PERF_RISCV_TRAP_TYPES_H



/* Exception cause high bit - is an interrupt if set */

#define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))



/* Interrupt causes (minus the high bit) */

#define IRQ_S_SOFT 1

#define IRQ_VS_SOFT 2

#define IRQ_M_SOFT 3

#define IRQ_S_TIMER 5

#define IRQ_VS_TIMER 6

#define IRQ_M_TIMER 7

#define IRQ_S_EXT 9

#define IRQ_VS_EXT 10

#define IRQ_M_EXT 11

#define IRQ_S_GEXT 12

#define IRQ_PMU_OVF 13



/* Exception causes */

#define EXC_INST_MISALIGNED 0

#define EXC_INST_ACCESS 1

#define EXC_INST_ILLEGAL 2
@@ -21,15 +38,20 @@ 
#define EXC_VIRTUAL_INST_FAULT 22

#define EXC_STORE_GUEST_PAGE_FAULT 23



#define EXC(x) {EXC_##x, #x }

#define TRAP(x) { x, #x }



#define kvm_riscv_exception_class                                         \

	EXC(INST_MISALIGNED), EXC(INST_ACCESS), EXC(INST_ILLEGAL),         \

	EXC(BREAKPOINT), EXC(LOAD_MISALIGNED), EXC(LOAD_ACCESS),           \

	EXC(STORE_MISALIGNED), EXC(STORE_ACCESS), EXC(SYSCALL),            \

	EXC(HYPERVISOR_SYSCALL), EXC(SUPERVISOR_SYSCALL),                  \

	EXC(INST_PAGE_FAULT), EXC(LOAD_PAGE_FAULT), EXC(STORE_PAGE_FAULT), \

	EXC(INST_GUEST_PAGE_FAULT), EXC(LOAD_GUEST_PAGE_FAULT),            \

	EXC(VIRTUAL_INST_FAULT), EXC(STORE_GUEST_PAGE_FAULT)

#define kvm_riscv_trap_class \

	TRAP(IRQ_S_SOFT), TRAP(IRQ_VS_SOFT), TRAP(IRQ_M_SOFT), \

	TRAP(IRQ_S_TIMER), TRAP(IRQ_VS_TIMER), TRAP(IRQ_M_TIMER), \

	TRAP(IRQ_S_EXT), TRAP(IRQ_VS_EXT), TRAP(IRQ_M_EXT), \

	TRAP(IRQ_S_GEXT), TRAP(IRQ_PMU_OVF), \

	TRAP(EXC_INST_MISALIGNED), TRAP(EXC_INST_ACCESS), TRAP(EXC_INST_ILLEGAL), \

	TRAP(EXC_BREAKPOINT), TRAP(EXC_LOAD_MISALIGNED), TRAP(EXC_LOAD_ACCESS), \

	TRAP(EXC_STORE_MISALIGNED), TRAP(EXC_STORE_ACCESS), TRAP(EXC_SYSCALL), \

	TRAP(EXC_HYPERVISOR_SYSCALL), TRAP(EXC_SUPERVISOR_SYSCALL), \

	TRAP(EXC_INST_PAGE_FAULT), TRAP(EXC_LOAD_PAGE_FAULT), \

	TRAP(EXC_STORE_PAGE_FAULT), TRAP(EXC_INST_GUEST_PAGE_FAULT), \

	TRAP(EXC_LOAD_GUEST_PAGE_FAULT), TRAP(EXC_VIRTUAL_INST_FAULT), \

	TRAP(EXC_STORE_GUEST_PAGE_FAULT)



#endif /* ARCH_PERF_RISCV_EXCEPTION_TYPES_H */
 
#endif /* ARCH_PERF_RISCV_TRAP_TYPES_H */