Commit 3ba98a8c authored by Geetha sowjanya's avatar Geetha sowjanya Committed by Paolo Abeni
Browse files

octeontx2-af: Fix mcs stats register address 



This patch adds the miss mcs stats register
for mcs supported platforms.

Fixes: 9312150a ("octeontx2-af: cn10k: mcs: Support for stats collection")
Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Reviewed-by: default avatarWojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 9723b2cc

drivers/net/ethernet/marvell/octeontx2/af/mcs.c

+2 −2
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id 
	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);

	stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);

	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(id);

	stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);



	reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);
@@ -215,7 +215,7 @@ void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats, 
		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);

		stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);



		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);

		reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(id);

		stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);



		if (mcs->hw->mcs_blks > 1) {

drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h

+27 −4
Original line number Diff line number Diff line
@@ -810,14 +810,37 @@ 
		offset = 0x9d8ull;			\

	offset; })



#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({	\

	u64 offset;					\

							\

	offset = 0xee80ull;				\

	if (mcs->hw->mcs_blks > 1)			\

		offset = 0xe818ull;			\

	offset += (a) * 0x8ull;				\

	offset; })



#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({	\

	u64 offset;					\

							\

	offset = 0xa680ull;				\

	if (mcs->hw->mcs_blks > 1)			\

		offset = 0xd018ull;			\

	offset += (a) * 0x8ull;				\

	offset; })



#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a)	({	\

	u64 offset;						\

								\

	offset = 0xf680ull;					\

	if (mcs->hw->mcs_blks > 1)				\

		offset = 0xe018ull;				\

	offset += (a) * 0x8ull;					\

	offset; })



#define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a)	(0xe680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a)	(0xde80ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(a)	(0xa680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a)	(0xd218 + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a)	(0xd018ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(a)	(0xee80ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a)		(0xb680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) (0xf680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a)	(0x12680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull)

#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a)	(0x13680ull + (a) * 0x8ull)