Commit 3c30d575 authored by Takashi Iwai's avatar Takashi Iwai
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ALSA: sparc/dbri: Use guard() for spin locks 



Clean up the code using guard() for spin locks.

Merely code refactoring, and no behavior change.

Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 4baca4bf

sound/sparc/dbri.c

+109 −123
Original line number Diff line number Diff line
@@ -758,11 +758,9 @@ static void dbri_initialize(struct snd_dbri *dbri) 
	u32 dvma_addr = (u32)dbri->dma_dvma;

	s32 *cmd;

	u32 dma_addr;

	unsigned long flags;

	int n;



	spin_lock_irqsave(&dbri->lock, flags);



	scoped_guard(spinlock_irqsave, &dbri->lock) {

		dbri_reset(dbri);



		/* Initialize pipes */
@@ -779,7 +777,7 @@ static void dbri_initialize(struct snd_dbri *dbri) 
		/*

		 * Set up the interrupt queue

		 */

	spin_lock(&dbri->cmdlock);

		scoped_guard(spinlock, &dbri->cmdlock) {

			cmd = dbri->cmdptr = dbri->dma->cmd;

			*(cmd++) = DBRI_CMD(D_IIQ, 0, 0);

			*(cmd++) = dma_addr;
@@ -789,9 +787,9 @@ static void dbri_initialize(struct snd_dbri *dbri) 
			*(cmd++) = DBRI_CMD(D_WAIT, 1, 0);

			dma_addr = dvma_addr + dbri_dma_off(cmd, 0);

			sbus_writel(dma_addr, dbri->regs + REG8);

	spin_unlock(&dbri->cmdlock);

		}

	}



	spin_unlock_irqrestore(&dbri->lock, flags);

	dbri_cmdwait(dbri);

}
@@ -1002,7 +1000,6 @@ static void unlink_time_slot(struct snd_dbri *dbri, int pipe, 
static void xmit_fixed(struct snd_dbri *dbri, int pipe, unsigned int data)

{

	s32 *cmd;

	unsigned long flags;



	if (pipe < 16 || pipe > DBRI_MAX_PIPE) {

		printk(KERN_ERR "DBRI: xmit_fixed: Illegal pipe number\n");
@@ -1037,9 +1034,10 @@ static void xmit_fixed(struct snd_dbri *dbri, int pipe, unsigned int data) 
	*(cmd++) = data;

	*(cmd++) = DBRI_CMD(D_PAUSE, 0, 0);



	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		dbri_cmdsend(dbri, cmd, 3);

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	dbri_cmdwait(dbri);



}
@@ -1317,9 +1315,7 @@ to the DBRI via the CHI interface and few of the DBRI's PIO pins. 
*/

static void cs4215_setup_pipes(struct snd_dbri *dbri)

{

	unsigned long flags;



	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		/*

		 * Data mode:

		 * Pipe  4: Send timeslots 1-4 (audio data)
@@ -1343,7 +1339,7 @@ static void cs4215_setup_pipes(struct snd_dbri *dbri) 
		setup_pipe(dbri, 17, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB);

		setup_pipe(dbri, 18, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);

		setup_pipe(dbri, 19, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	dbri_cmdwait(dbri);

}
@@ -1418,7 +1414,6 @@ static void cs4215_open(struct snd_dbri *dbri) 
{

	int data_width;

	u32 tmp;

	unsigned long flags;



	dprintk(D_MM, "cs4215_open: %d channels, %d bits\n",

		dbri->mm.channels, dbri->mm.precision);
@@ -1443,7 +1438,7 @@ static void cs4215_open(struct snd_dbri *dbri) 
	 * bits.  The CS4215, it seems, observes TSIN (the delayed signal)

	 * even if it's the CHI master.  Don't ask me...

	 */

	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		tmp = sbus_readl(dbri->regs + REG0);

		tmp &= ~(D_C);		/* Disable CHI */

		sbus_writel(tmp, dbri->regs + REG0);
@@ -1471,7 +1466,7 @@ static void cs4215_open(struct snd_dbri *dbri) 
		tmp = sbus_readl(dbri->regs + REG0);

		tmp |= D_C;		/* Enable CHI */

		sbus_writel(tmp, dbri->regs + REG0);

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	cs4215_setdata(dbri, 0);

}
@@ -1483,7 +1478,6 @@ static int cs4215_setctrl(struct snd_dbri *dbri) 
{

	int i, val;

	u32 tmp;

	unsigned long flags;



	/* FIXME - let the CPU do something useful during these delays */
@@ -1520,7 +1514,7 @@ static int cs4215_setctrl(struct snd_dbri *dbri) 
	 * done in hardware by a TI 248 that delays the DBRI->4215

	 * frame sync signal by eight clock cycles.  Anybody know why?

	 */

	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		tmp = sbus_readl(dbri->regs + REG0);

		tmp &= ~D_C;		/* Disable CHI */

		sbus_writel(tmp, dbri->regs + REG0);
@@ -1537,17 +1531,17 @@ static int cs4215_setctrl(struct snd_dbri *dbri) 
		link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset);

		link_time_slot(dbri, 18, 16, 16, 8, dbri->mm.offset);

		link_time_slot(dbri, 19, 18, 16, 8, dbri->mm.offset + 48);

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	/* Wait for the chip to echo back CLB (Control Latch Bit) as zero */

	dbri->mm.ctrl[0] &= ~CS4215_CLB;

	xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl);



	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		tmp = sbus_readl(dbri->regs + REG0);

		tmp |= D_C;		/* Enable CHI */

		sbus_writel(tmp, dbri->regs + REG0);

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i)

		msleep_interruptible(1);
@@ -1709,7 +1703,6 @@ static void xmit_descs(struct snd_dbri *dbri) 
	struct dbri_streaminfo *info;

	u32 dvma_addr;

	s32 *cmd;

	unsigned long flags;

	int first_td;



	if (dbri == NULL)
@@ -1717,7 +1710,7 @@ static void xmit_descs(struct snd_dbri *dbri) 


	dvma_addr = (u32)dbri->dma_dvma;

	info = &dbri->stream_info[DBRI_REC];

	spin_lock_irqsave(&dbri->lock, flags);

	guard(spinlock_irqsave)(&dbri->lock);



	if (info->pipe >= 0) {

		first_td = dbri->pipes[info->pipe].first_desc;
@@ -1760,8 +1753,6 @@ static void xmit_descs(struct snd_dbri *dbri) 
			dbri->pipes[info->pipe].desc = first_td;

		}

	}



	spin_unlock_irqrestore(&dbri->lock, flags);

}



/* transmission_complete_intr()
@@ -1932,7 +1923,7 @@ static irqreturn_t snd_dbri_interrupt(int irq, void *dev_id) 


	if (dbri == NULL)

		return IRQ_NONE;

	spin_lock(&dbri->lock);

	guard(spinlock)(&dbri->lock);



	/*

	 * Read it, so the interrupt goes away.
@@ -1977,8 +1968,6 @@ static irqreturn_t snd_dbri_interrupt(int irq, void *dev_id) 


	dbri_process_interrupt_buffer(dbri);



	spin_unlock(&dbri->lock);



	return IRQ_HANDLED;

}
@@ -2046,17 +2035,16 @@ static int snd_dbri_open(struct snd_pcm_substream *substream) 
	struct snd_dbri *dbri = snd_pcm_substream_chip(substream);

	struct snd_pcm_runtime *runtime = substream->runtime;

	struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);

	unsigned long flags;



	dprintk(D_USR, "open audio output.\n");

	runtime->hw = snd_dbri_pcm_hw;



	spin_lock_irqsave(&dbri->lock, flags);

	scoped_guard(spinlock_irqsave, &dbri->lock) {

		info->substream = substream;

		info->offset = 0;

		info->dvma_buffer = 0;

		info->pipe = -1;

	spin_unlock_irqrestore(&dbri->lock, flags);

	}



	snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,

			    snd_hw_rule_format, NULL, SNDRV_PCM_HW_PARAM_FORMAT,
@@ -2160,7 +2148,7 @@ static int snd_dbri_prepare(struct snd_pcm_substream *substream) 
	else

		info->pipe = 6;	/* Receive pipe */



	spin_lock_irq(&dbri->lock);

	guard(spinlock_irq)(&dbri->lock);

	info->offset = 0;



	/* Setup the all the transmit/receive descriptors to cover the
@@ -2169,8 +2157,6 @@ static int snd_dbri_prepare(struct snd_pcm_substream *substream) 
	ret = setup_descs(dbri, DBRI_STREAMNO(substream),

			  snd_pcm_lib_period_bytes(substream));



	spin_unlock_irq(&dbri->lock);



	dprintk(D_USR, "prepare audio output. %d bytes\n", info->size);

	return ret;

}