Commit 3c3b41e5 authored by James Clark's avatar James Clark Committed by Arnaldo Carvalho de Melo
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perf cs-etm: Finish removal of ETM_OPT_* 



These #defines have been removed from the kernel headers in favour of
the string based PMU format attributes. Usages were previously removed
from the recording side of cs-etm in Perf. Finish the removal by
removing usages from the decode side too.

It's a straight replacement of the old #defines with the new register
bit definitions. Except cs_etm__setup_timeless_decoding() which wasn't
looking at the saved metadata and was instead hard coding an access to
'attr.config'. This was vulnerable to the same issue of .config being
moved to .config2 etc that the original removal of ETM_OPT_* tried to
fix. So fix that too.

Signed-off-by: default avatarJames Clark <james.clark@linaro.org>
Tested-by: default avatarLeo Yan <leo.yan@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 0693907f

tools/perf/arch/arm/util/cs-etm.c

+0 −14
Original line number Diff line number Diff line
@@ -68,20 +68,6 @@ static const char * const metadata_ete_ro[] = { 


enum cs_etm_version { CS_NOT_PRESENT, CS_ETMV3, CS_ETMV4, CS_ETE };



/* ETMv4 CONFIGR register bits */

#define TRCCONFIGR_BB		BIT(3)

#define TRCCONFIGR_CCI		BIT(4)

#define TRCCONFIGR_CID		BIT(6)

#define TRCCONFIGR_VMID		BIT(7)

#define TRCCONFIGR_TS		BIT(11)

#define TRCCONFIGR_RS		BIT(12)

#define TRCCONFIGR_VMIDOPT	BIT(15)



/* ETMv3 ETMCR register bits */

#define ETMCR_CYC_ACC		BIT(12)

#define ETMCR_TIMESTAMP_EN	BIT(28)

#define ETMCR_RETURN_STACK	BIT(29)



static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu);

static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val);

static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path);

tools/perf/util/cs-etm-decoder/cs-etm-decoder.c

+1 −1
Original line number Diff line number Diff line
@@ -549,7 +549,7 @@ cs_etm_decoder__set_tid(struct cs_etm_queue *etmq, 
	/*

	 * Process the PE_CONTEXT packets if we have a valid contextID or VMID.

	 * If the kernel is running at EL2, the PID is traced in CONTEXTIDR_EL2

	 * as VMID, Bit ETM_OPT_CTXTID2 is set in this case.

	 * as VMID, Format attribute 'contextid2' is set in this case.

	 */

	switch (cs_etm__get_pid_fmt(etmq)) {

	case CS_ETM_PIDFMT_CTXTID:

tools/perf/util/cs-etm.c

+13 −23
Original line number Diff line number Diff line
@@ -194,7 +194,7 @@ int cs_etm__get_cpu(struct cs_etm_queue *etmq, u8 trace_chan_id, int *cpu) 
 *   CS_ETM_PIDFMT_CTXTID2: CONTEXTIDR_EL2 is traced.

 *   CS_ETM_PIDFMT_NONE: No context IDs

 *

 * It's possible that the two bits ETM_OPT_CTXTID and ETM_OPT_CTXTID2

 * It's possible that the two format attributes 'contextid1' and 'contextid2'

 * are enabled at the same time when the session runs on an EL2 kernel.

 * This means the CONTEXTIDR_EL1 and CONTEXTIDR_EL2 both will be

 * recorded in the trace data, the tool will selectively use
@@ -210,15 +210,15 @@ static enum cs_etm_pid_fmt cs_etm__init_pid_fmt(u64 *metadata) 
	if (metadata[CS_ETM_MAGIC] == __perf_cs_etmv3_magic) {

		val = metadata[CS_ETM_ETMCR];

		/* CONTEXTIDR is traced */

		if (val & BIT(ETM_OPT_CTXTID))

		if (val & ETMCR_CTXTID)

			return CS_ETM_PIDFMT_CTXTID;

	} else {

		val = metadata[CS_ETMV4_TRCCONFIGR];

		/* CONTEXTIDR_EL2 is traced */

		if (val & (BIT(ETM4_CFG_BIT_VMID) | BIT(ETM4_CFG_BIT_VMID_OPT)))

		if (val & (TRCCONFIGR_VMID | TRCCONFIGR_VMIDOPT))

			return CS_ETM_PIDFMT_CTXTID2;

		/* CONTEXTIDR_EL1 is traced */

		else if (val & BIT(ETM4_CFG_BIT_CTXTID))

		else if (val & TRCCONFIGR_CID)

			return CS_ETM_PIDFMT_CTXTID;

	}
@@ -2914,29 +2914,21 @@ static int cs_etm__process_auxtrace_event(struct perf_session *session, 
	return 0;

}



static int cs_etm__setup_timeless_decoding(struct cs_etm_auxtrace *etm)

static void cs_etm__setup_timeless_decoding(struct cs_etm_auxtrace *etm)

{

	struct evsel *evsel;

	struct evlist *evlist = etm->session->evlist;

	/* Take first ETM as all options will be the same for all ETMs */

	u64 *metadata = etm->metadata[0];



	/* Override timeless mode with user input from --itrace=Z */

	if (etm->synth_opts.timeless_decoding) {

		etm->timeless_decoding = true;

		return 0;

	}



	/*

	 * Find the cs_etm evsel and look at what its timestamp setting was

	 */

	evlist__for_each_entry(evlist, evsel)

		if (cs_etm__evsel_is_auxtrace(etm->session, evsel)) {

			etm->timeless_decoding =

				!(evsel->core.attr.config & BIT(ETM_OPT_TS));

			return 0;

		return;

	}



	pr_err("CS ETM: Couldn't find ETM evsel\n");

	return -EINVAL;

	if (metadata[CS_ETM_MAGIC] == __perf_cs_etmv3_magic)

		etm->timeless_decoding = !(metadata[CS_ETM_ETMCR] & ETMCR_TIMESTAMP_EN);

	else

		etm->timeless_decoding = !(metadata[CS_ETMV4_TRCCONFIGR] & TRCCONFIGR_TS);

}



/*
@@ -3499,9 +3491,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, 
	etm->auxtrace.evsel_is_auxtrace = cs_etm__evsel_is_auxtrace;

	session->auxtrace = &etm->auxtrace;



	err = cs_etm__setup_timeless_decoding(etm);

	if (err)

		return err;

	cs_etm__setup_timeless_decoding(etm);



	etm->tc.time_shift = tc->time_shift;

	etm->tc.time_mult = tc->time_mult;

tools/perf/util/cs-etm.h

+15 −0
Original line number Diff line number Diff line
@@ -230,6 +230,21 @@ struct cs_etm_packet_queue { 
/* CoreSight trace ID is currently the bottom 7 bits of the value */

#define CORESIGHT_TRACE_ID_VAL_MASK	GENMASK(6, 0)



/* ETMv4 CONFIGR register bits */

#define TRCCONFIGR_BB		BIT(3)

#define TRCCONFIGR_CCI		BIT(4)

#define TRCCONFIGR_CID		BIT(6)

#define TRCCONFIGR_VMID		BIT(7)

#define TRCCONFIGR_TS		BIT(11)

#define TRCCONFIGR_RS		BIT(12)

#define TRCCONFIGR_VMIDOPT	BIT(15)



/* ETMv3 ETMCR register bits */

#define ETMCR_CYC_ACC		BIT(12)

#define ETMCR_CTXTID		BIT(14)

#define ETMCR_TIMESTAMP_EN	BIT(28)

#define ETMCR_RETURN_STACK	BIT(29)



int cs_etm__process_auxtrace_info(union perf_event *event,

				  struct perf_session *session);

void cs_etm_get_default_config(const struct perf_pmu *pmu, struct perf_event_attr *attr);