Commit 3ce8f586 authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
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arm64: scs: Remove redundant save/restore of SCS SP on entry to/from EL0



When returning to userspace, the SCS is empty and so the SCS SP just
points to the base address of the SCS page.

Rather than saving and restoring this address in the current task, we
can simply restore the SCS SP to point at the base of the stack on entry
to EL1 from EL0.

Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Acked-by: default avatarArd Biesheuvel <ardb@kernel.org>
Reviewed-by: default avatarSami Tolvanen <samitolvanen@google.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 6712fcde
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+8 −0
Original line number Diff line number Diff line
@@ -10,6 +10,11 @@
#ifdef CONFIG_SHADOW_CALL_STACK
	scs_sp	.req	x18

	.macro scs_load_current_base
	get_current_task scs_sp
	ldr	scs_sp, [scs_sp, #TSK_TI_SCS_BASE]
	.endm

	.macro scs_load_current
	get_current_task scs_sp
	ldr	scs_sp, [scs_sp, #TSK_TI_SCS_SP]
@@ -19,6 +24,9 @@
	str	scs_sp, [\tsk, #TSK_TI_SCS_SP]
	.endm
#else
	.macro scs_load_current_base
	.endm

	.macro scs_load_current
	.endm

+1 −3
Original line number Diff line number Diff line
@@ -273,7 +273,7 @@ alternative_if ARM64_HAS_ADDRESS_AUTH
alternative_else_nop_endif
1:

	scs_load_current
	scs_load_current_base
	.else
	add	x21, sp, #PT_REGS_SIZE
	get_current_task tsk
@@ -378,8 +378,6 @@ alternative_if ARM64_WORKAROUND_845719
alternative_else_nop_endif
#endif
3:
	scs_save tsk

	/* Ignore asynchronous tag check faults in the uaccess routines */
	ldr	x0, [tsk, THREAD_SCTLR_USER]
	clear_mte_async_tcf x0