Commit 3ce9bbba authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Remove hand-crafted masks for FGT registers 



These masks are now useless, and can be removed.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent aed34b6d

arch/arm64/include/asm/kvm_arm.h

+1 −48
Original line number Diff line number Diff line
@@ -315,54 +315,7 @@ 
				 GENMASK(19, 18) |	\

				 GENMASK(15, 0))



/*

 * FGT register definitions

 *

 * RES0 and polarity masks as of DDI0487J.a, to be updated as needed.

 * We're not using the generated masks as they are usually ahead of

 * the published ARM ARM, which we use as a reference.

 *

 * Once we get to a point where the two describe the same thing, we'll

 * merge the definitions. One day.

 */

#define __HFGRTR_EL2_RES0	HFGRTR_EL2_RES0

#define __HFGRTR_EL2_MASK	GENMASK(49, 0)

#define __HFGRTR_EL2_nMASK	~(__HFGRTR_EL2_RES0 | __HFGRTR_EL2_MASK)



/*

 * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any

 * future additions, define __HFGWTR* macros relative to __HFGRTR* ones.

 */

#define __HFGRTR_ONLY_MASK	(BIT(46) | BIT(42) | BIT(40) | BIT(28) | \

				 GENMASK(26, 25) | BIT(21) | BIT(18) | \

				 GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))

#define __HFGWTR_EL2_RES0	HFGWTR_EL2_RES0

#define __HFGWTR_EL2_MASK	(__HFGRTR_EL2_MASK & ~__HFGRTR_ONLY_MASK)

#define __HFGWTR_EL2_nMASK	~(__HFGWTR_EL2_RES0 | __HFGWTR_EL2_MASK)



#define __HFGITR_EL2_RES0	HFGITR_EL2_RES0

#define __HFGITR_EL2_MASK	(BIT(62) | BIT(60) | GENMASK(54, 0))

#define __HFGITR_EL2_nMASK	~(__HFGITR_EL2_RES0 | __HFGITR_EL2_MASK)



#define __HDFGRTR_EL2_RES0	HDFGRTR_EL2_RES0

#define __HDFGRTR_EL2_MASK	(BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \

				 GENMASK(41, 40) | GENMASK(37, 22) | \

				 GENMASK(19, 9) | GENMASK(7, 0))

#define __HDFGRTR_EL2_nMASK	~(__HDFGRTR_EL2_RES0 | __HDFGRTR_EL2_MASK)



#define __HDFGWTR_EL2_RES0	HDFGWTR_EL2_RES0

#define __HDFGWTR_EL2_MASK	(GENMASK(57, 52) | GENMASK(50, 48) | \

				 GENMASK(46, 44) | GENMASK(42, 41) | \

				 GENMASK(37, 35) | GENMASK(33, 31) | \

				 GENMASK(29, 23) | GENMASK(21, 10) | \

				 GENMASK(8, 7) | GENMASK(5, 0))

#define __HDFGWTR_EL2_nMASK	~(__HDFGWTR_EL2_RES0 | __HDFGWTR_EL2_MASK)



#define __HAFGRTR_EL2_RES0	HAFGRTR_EL2_RES0

#define __HAFGRTR_EL2_MASK	(GENMASK(49, 17) | GENMASK(4, 0))

#define __HAFGRTR_EL2_nMASK	~(__HAFGRTR_EL2_RES0 | __HAFGRTR_EL2_MASK)



/* Similar definitions for HCRX_EL2 */

/* Polarity masks for HCRX_EL2 */

#define __HCRX_EL2_RES0         HCRX_EL2_RES0

#define __HCRX_EL2_MASK		(BIT(6))

#define __HCRX_EL2_nMASK	~(__HCRX_EL2_RES0 | __HCRX_EL2_MASK)

arch/arm64/kvm/hyp/include/hyp/switch.h

+0 −19
Original line number Diff line number Diff line
@@ -156,17 +156,6 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu) 
#define update_fgt_traps(hctxt, vcpu, kvm, reg)		\

	update_fgt_traps_cs(hctxt, vcpu, kvm, reg, 0, 0)



/*

 * Validate the fine grain trap masks.

 * Check that the masks do not overlap and that all bits are accounted for.

 */

#define CHECK_FGT_MASKS(reg)							\

	do {									\

		BUILD_BUG_ON((__ ## reg ## _MASK) & (__ ## reg ## _nMASK));	\

		BUILD_BUG_ON(~((__ ## reg ## _RES0) ^ (__ ## reg ## _MASK) ^	\

			       (__ ## reg ## _nMASK)));				\

	} while(0)



static inline bool cpu_has_amu(void)

{

       u64 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1);
@@ -180,14 +169,6 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu) 
	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);

	struct kvm *kvm = kern_hyp_va(vcpu->kvm);



	CHECK_FGT_MASKS(HFGRTR_EL2);

	CHECK_FGT_MASKS(HFGWTR_EL2);

	CHECK_FGT_MASKS(HFGITR_EL2);

	CHECK_FGT_MASKS(HDFGRTR_EL2);

	CHECK_FGT_MASKS(HDFGWTR_EL2);

	CHECK_FGT_MASKS(HAFGRTR_EL2);

	CHECK_FGT_MASKS(HCRX_EL2);



	if (!cpus_have_final_cap(ARM64_HAS_FGT))

		return;