Commit 3d1bb1a2 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: Add sdma v4_4_5 ip block 



Add sdma v4_4_5 ip block support

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLe Ma <le.ma@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c45211ad

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+3 −0
Original line number Diff line number Diff line
@@ -1781,6 +1781,7 @@ static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(4, 2, 1):

	case IP_VERSION(4, 4, 0):

	case IP_VERSION(4, 4, 2):

	case IP_VERSION(4, 4, 5):

		amdgpu_device_ip_block_add(adev, &vega20_ih_ip_block);

		break;

	case IP_VERSION(5, 0, 0):
@@ -2064,6 +2065,7 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev) 
		amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);

		break;

	case IP_VERSION(4, 4, 2):

	case IP_VERSION(4, 4, 5):

		amdgpu_device_ip_block_add(adev, &sdma_v4_4_2_ip_block);

		break;

	case IP_VERSION(5, 0, 0):
@@ -2616,6 +2618,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) 
	case IP_VERSION(4, 2, 1):

	case IP_VERSION(4, 4, 0):

	case IP_VERSION(4, 4, 2):

	case IP_VERSION(4, 4, 5):

		adev->hdp.funcs = &hdp_v4_0_funcs;

		break;

	case IP_VERSION(5, 0, 0):

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

+5 −4
Original line number Diff line number Diff line
@@ -258,9 +258,10 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, 
				else {

					/* Use a single copy per SDMA firmware type. PSP uses the same instance for all

					 * groups of SDMAs */

					if (amdgpu_ip_version(adev, SDMA0_HWIP,

							      0) ==

						    IP_VERSION(4, 4, 2) &&

					if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

						IP_VERSION(4, 4, 2) ||

					     amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

						IP_VERSION(4, 4, 5)) &&

					    adev->firmware.load_type ==

						AMDGPU_FW_LOAD_PSP &&

					    adev->sdma.num_inst_per_aid == i) {

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

+4 −2
Original line number Diff line number Diff line
@@ -50,7 +50,8 @@ static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev, 
				    struct amdgpu_ring *ring)

{

	if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 0) ||

	    amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2))

	    amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) ||

	    amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5))

		return;



	if (!ring || !ring->funcs->emit_wreg)
@@ -129,7 +130,8 @@ static void hdp_v4_0_get_clockgating_state(struct amdgpu_device *adev, 
{

	int data;



	if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2)) {

	if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) ||

	    amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5)) {

		/* Default enabled */

		*flags |= AMD_CG_SUPPORT_HDP_MGCG;

		return;

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

+6 −3
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 
#include "amdgpu_ras.h"



MODULE_FIRMWARE("amdgpu/sdma_4_4_2.bin");

MODULE_FIRMWARE("amdgpu/sdma_4_4_5.bin");



#define mmSMNAID_AID0_MCA_SMU 0x03b30400
@@ -134,8 +135,8 @@ static int sdma_v4_4_2_init_microcode(struct amdgpu_device *adev) 
	int ret, i;



	for (i = 0; i < adev->sdma.num_instances; i++) {

		if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

		    IP_VERSION(4, 4, 2)) {

		if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) ||

		    amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) {

			ret = amdgpu_sdma_init_microcode(adev, 0, true);

			break;

		} else {
@@ -1229,6 +1230,7 @@ static bool sdma_v4_4_2_fw_support_paging_queue(struct amdgpu_device *adev) 
{

	switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

	case IP_VERSION(4, 4, 2):

	case IP_VERSION(4, 4, 5):

		return false;

	default:

		return false;
@@ -1392,7 +1394,8 @@ static int sdma_v4_4_2_sw_fini(void *handle) 
			amdgpu_ring_fini(&adev->sdma.instance[i].page);

	}



	if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2))

	if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) ||

	    amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5))

		amdgpu_sdma_destroy_inst_ctx(adev, true);

	else

		amdgpu_sdma_destroy_inst_ctx(adev, false);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

+6 −3
Original line number Diff line number Diff line
@@ -306,7 +306,8 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev) 
		 * driver needs to program it properly according to

		 * MC_SPACE type in IH_RB_CNTL */

		if ((amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 0)) ||

		    (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2))) {

		    (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2)) ||

		    (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 5))) {

			ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN);

			if (adev->irq.ih.use_bus_addr) {

				ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
@@ -337,7 +338,8 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev) 


	/* Enable IH Retry CAM */

	if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 0) ||

	    amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2))

	    amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2) ||

	    amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 5))

		WREG32_FIELD15(OSSSYS, 0, IH_RETRY_INT_CAM_CNTL_ALDEBARAN,

			       ENABLE, 1);

	else
@@ -562,7 +564,8 @@ static int vega20_ih_sw_init(void *handle) 
	adev->irq.ih1.use_doorbell = true;

	adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1;



	if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) != IP_VERSION(4, 4, 2)) {

	if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) != IP_VERSION(4, 4, 2) &&

	    amdgpu_ip_version(adev, OSSSYS_HWIP, 0) != IP_VERSION(4, 4, 5)) {

		r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true);

		if (r)

			return r;