Commit 3d25ef32 authored by Luke Wang's avatar Luke Wang Committed by Shawn Guo
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arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2



The drive strength is too high for SDR104 mode. Change the drive
strength to X3 as hardware team recommends.

Signed-off-by: default avatarLuke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent fd7053e8
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+6 −6
Original line number Diff line number Diff line
@@ -881,12 +881,12 @@ IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <
			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x15fe
			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x13fe
			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x13fe
			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x13fe
			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x13fe
			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x13fe
			IMX95_PAD_SD2_CLK__USDHC2_CLK				0x158e
			IMX95_PAD_SD2_CMD__USDHC2_CMD				0x138e
			IMX95_PAD_SD2_DATA0__USDHC2_DATA0			0x138e
			IMX95_PAD_SD2_DATA1__USDHC2_DATA1			0x138e
			IMX95_PAD_SD2_DATA2__USDHC2_DATA2			0x138e
			IMX95_PAD_SD2_DATA3__USDHC2_DATA3			0x138e
			IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT			0x51e
		>;
	};