Commit 3d4ffdfc authored by Brian Masney's avatar Brian Masney Committed by Vinod Koul
Browse files

phy: rockchip: phy-rockchip-samsung-hdptx: convert from round_rate() to determine_rate() 



The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Reviewed-by: default avatarCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarBrian Masney <bmasney@redhat.com>
Link: https://patch.msgid.link/20251212-phy-clk-round-rate-v3-8-beae3962f767@redhat.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 2f787029

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

+9 −6
Original line number Diff line number Diff line
@@ -1838,8 +1838,8 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw, 
	return hdptx->hw_rate;

}



static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,

					unsigned long *parent_rate)

static int rk_hdptx_phy_clk_determine_rate(struct clk_hw *hw,

					   struct clk_rate_request *req)

{

	struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw);
@@ -1848,9 +1848,9 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, 
	 * To be dropped as soon as the RK DW HDMI QP bridge driver

	 * switches to make use of phy_configure().

	 */

	if (!hdptx->restrict_rate_change && rate != hdptx->hdmi_cfg.tmds_char_rate) {

	if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.tmds_char_rate) {

		struct phy_configure_opts_hdmi hdmi = {

			.tmds_char_rate = rate,

			.tmds_char_rate = req->rate,

		};

		int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi);
@@ -1865,7 +1865,10 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, 
	 * hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with

	 * a different rate argument.

	 */

	return DIV_ROUND_CLOSEST_ULL(hdptx->hdmi_cfg.tmds_char_rate * 8, hdptx->hdmi_cfg.bpc);

	req->rate = DIV_ROUND_CLOSEST_ULL(hdptx->hdmi_cfg.tmds_char_rate * 8,

					  hdptx->hdmi_cfg.bpc);



	return 0;

}



static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -1895,7 +1898,7 @@ static const struct clk_ops hdptx_phy_clk_ops = { 
	.prepare = rk_hdptx_phy_clk_prepare,

	.unprepare = rk_hdptx_phy_clk_unprepare,

	.recalc_rate = rk_hdptx_phy_clk_recalc_rate,

	.round_rate = rk_hdptx_phy_clk_round_rate,

	.determine_rate = rk_hdptx_phy_clk_determine_rate,

	.set_rate = rk_hdptx_phy_clk_set_rate,

};