Commit 3d8fd28d authored by Ryan Wanner's avatar Ryan Wanner Committed by Manikandan Muralidharan
Browse files

drm: atmel-hlcdc: add LCD controller layer definition for sama7d65 



Add the LCD controller layer definition and atmel_hlcdc_of_match
entry for sama7d65.

Signed-off-by: default avatarRyan Wanner <Ryan.Wanner@microchip.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://patch.msgid.link/20251218040521.463937-3-manikandan.m@microchip.com


Signed-off-by: default avatarManikandan Muralidharan <manikandan.m@microchip.com>
parent b99deb61

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

+81 −0
Original line number Diff line number Diff line
@@ -566,6 +566,83 @@ static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sam9x75 = { 
	.ops = &atmel_xlcdc_ops,

};



static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sama7d65_layers[] = {

	{

		.name = "base",

		.formats = &atmel_hlcdc_plane_rgb_formats,

		.regs_offset = 0x60,

		.id = 0,

		.type = ATMEL_HLCDC_BASE_LAYER,

		.cfgs_offset = 0x1c,

		.layout = {

			.xstride = { 2 },

			.default_color = 3,

			.general_config = 4,

			.disc_pos = 5,

			.disc_size = 6,

		},

		.clut_offset = 0x700,

	},

	{

		.name = "overlay1",

		.formats = &atmel_hlcdc_plane_rgb_formats,

		.regs_offset = 0x160,

		.id = 1,

		.type = ATMEL_HLCDC_OVERLAY_LAYER,

		.cfgs_offset = 0x1c,

		.layout = {

			.pos = 2,

			.size = 3,

			.xstride = { 4 },

			.pstride = { 5 },

			.default_color = 6,

			.chroma_key = 7,

			.chroma_key_mask = 8,

			.general_config = 9,

		},

		.clut_offset = 0xb00,

	},

	{

		.name = "high-end-overlay",

		.formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,

		.regs_offset = 0x360,

		.id = 2,

		.type = ATMEL_HLCDC_OVERLAY_LAYER,

		.cfgs_offset = 0x30,

		.layout = {

			.pos = 2,

			.size = 3,

			.memsize = 4,

			.xstride = { 5, 7 },

			.pstride = { 6, 8 },

			.default_color = 9,

			.chroma_key = 10,

			.chroma_key_mask = 11,

			.general_config = 12,

			.csc = 16,

			.scaler_config = 23,

			.vxs_config = 30,

			.hxs_config = 31,

		},

		.clut_offset = 0x1300,

	},

};



static const struct atmel_hlcdc_dc_desc atmel_xlcdc_dc_sama7d65 = {

	.min_width = 0,

	.min_height = 0,

	.max_width = 2048,

	.max_height = 2048,

	.max_spw = 0x3ff,

	.max_vpw = 0x3ff,

	.max_hpw = 0x3ff,

	.fixed_clksrc = true,

	.is_xlcdc = true,

	.nlayers = ARRAY_SIZE(atmel_xlcdc_sama7d65_layers),

	.layers = atmel_xlcdc_sama7d65_layers,

	.ops = &atmel_xlcdc_ops,

};



static const struct of_device_id atmel_hlcdc_of_match[] = {

	{

		.compatible = "atmel,at91sam9n12-hlcdc",
@@ -595,6 +672,10 @@ static const struct of_device_id atmel_hlcdc_of_match[] = { 
		.compatible = "microchip,sam9x75-xlcdc",

		.data = &atmel_xlcdc_dc_sam9x75,

	},

	{

		.compatible = "microchip,sama7d65-xlcdc",

		.data = &atmel_xlcdc_dc_sama7d65,

	},

	{ /* sentinel */ },

};

MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);