Commit 3de9076e authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: pass dev_priv explicitly to CUR_FBC_CTL 



Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CUR_FBC_CTL register macro.

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f5e76f916ccf02aaf6016ffd476e9544817ac179.1715774156.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 2f757b4c

drivers/gpu/drm/i915/display/intel_cursor.c

+2 −1
Original line number Diff line number Diff line
@@ -646,7 +646,8 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane, 
	    plane->cursor.size != fbc_ctl ||

	    plane->cursor.cntl != cntl) {

		if (HAS_CUR_FBC(dev_priv))

			intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),

			intel_de_write_fw(dev_priv,

					  CUR_FBC_CTL(dev_priv, pipe),

					  fbc_ctl);

		intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);

		intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);

drivers/gpu/drm/i915/display/intel_cursor_regs.h

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ 
#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)

#define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)

#define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)

#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)

#define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)

#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A)

#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE)

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

+3 −3
Original line number Diff line number Diff line
@@ -154,9 +154,9 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) 
	MMIO_D(CURBASE(dev_priv, PIPE_A));

	MMIO_D(CURBASE(dev_priv, PIPE_B));

	MMIO_D(CURBASE(dev_priv, PIPE_C));

	MMIO_D(CUR_FBC_CTL(PIPE_A));

	MMIO_D(CUR_FBC_CTL(PIPE_B));

	MMIO_D(CUR_FBC_CTL(PIPE_C));

	MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_A));

	MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_B));

	MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_C));

	MMIO_D(_MMIO(0x700ac));

	MMIO_D(_MMIO(0x710ac));

	MMIO_D(_MMIO(0x720ac));