Commit 3e08f157 authored by Omer Shpigelman's avatar Omer Shpigelman Committed by Oded Gabbay
Browse files

habanalabs/gaudi: use direct MSI in single mode 



Due to FLR scenario when running inside a VM, we must not use indirect
MSI because it might cause some issues on VM destroy.
In a VM we use single MSI mode in contrary to multi MSI mode which is
used in bare-metal.
Hence direct MSI should be used in single MSI mode only.

Signed-off-by: default avatarOmer Shpigelman <oshpigelman@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent beb71ee3

drivers/misc/habanalabs/gaudi/gaudi.c

+6 −3
Original line number Diff line number Diff line
@@ -5802,6 +5802,7 @@ static void gaudi_add_end_of_cb_packets(struct hl_device *hdev, 
{

	struct gaudi_device *gaudi = hdev->asic_specific;

	struct packet_msg_prot *cq_pkt;

	u64 msi_addr;

	u32 tmp;



	cq_pkt = kernel_address + len - (sizeof(struct packet_msg_prot) * 2);
@@ -5823,10 +5824,12 @@ static void gaudi_add_end_of_cb_packets(struct hl_device *hdev, 
	cq_pkt->ctl = cpu_to_le32(tmp);

	cq_pkt->value = cpu_to_le32(1);



	if (!gaudi->multi_msi_mode)

		msi_vec = 0;

	if (gaudi->multi_msi_mode)

		msi_addr = mmPCIE_MSI_INTR_0 + msi_vec * 4;

	else

		msi_addr = mmPCIE_CORE_MSI_REQ;



	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_MSI_INTR_0 + msi_vec * 4);

	cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr);

}



static void gaudi_update_eq_ci(struct hl_device *hdev, u32 val)

drivers/misc/habanalabs/include/gaudi/asic_reg/gaudi_regs.h

+2 −0
Original line number Diff line number Diff line
@@ -308,6 +308,8 @@ 
#define mmPCIE_AUX_FLR_CTRL                                          0xC07394

#define mmPCIE_AUX_DBI                                               0xC07490



#define mmPCIE_CORE_MSI_REQ                                          0xC04100



#define mmPSOC_PCI_PLL_NR                                            0xC72100

#define mmSRAM_W_PLL_NR                                              0x4C8100

#define mmPSOC_HBM_PLL_NR                                            0xC74100