Commit 3e265f83 authored by Matthew Gerlach's avatar Matthew Gerlach Committed by Greg Kroah-Hartman
Browse files

fpga: dfl: refactor cci_enumerate_feature_devs() 



In preparation of looking for dfls based on a vendor specific pci
capability, move the code for the default method of finding the first
dfl at offset 0 of Bar 0 to its own function.

Acked-by: default avatarWu Hao <hao.wu@intel.com>
Signed-off-by: default avatarMatthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: default avatarMoritz Fischer <mdf@kernel.org>
Link: https://lore.kernel.org/r/20210107043714.991646-2-mdf@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4c5a6a7b

drivers/fpga/dfl-pci.c

+47 −37
Original line number Diff line number Diff line
@@ -119,49 +119,20 @@ static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec) 
	return table;

}



/* enumerate feature devices under pci device */

static int cci_enumerate_feature_devs(struct pci_dev *pcidev)

/* default method of finding dfls starting at offset 0 of bar 0 */

static int find_dfls_by_default(struct pci_dev *pcidev,

				struct dfl_fpga_enum_info *info)

{

	struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);

	int port_num, bar, i, nvec, ret = 0;

	struct dfl_fpga_enum_info *info;

	struct dfl_fpga_cdev *cdev;

	int port_num, bar, i, ret = 0;

	resource_size_t start, len;

	void __iomem *base;

	int *irq_table;

	u32 offset;

	u64 v;



	/* allocate enumeration info via pci_dev */

	info = dfl_fpga_enum_info_alloc(&pcidev->dev);

	if (!info)

		return -ENOMEM;



	/* add irq info for enumeration if the device support irq */

	nvec = cci_pci_alloc_irq(pcidev);

	if (nvec < 0) {

		dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);

		ret = nvec;

		goto enum_info_free_exit;

	} else if (nvec) {

		irq_table = cci_pci_create_irq_table(pcidev, nvec);

		if (!irq_table) {

			ret = -ENOMEM;

			goto irq_free_exit;

		}



		ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);

		kfree(irq_table);

		if (ret)

			goto irq_free_exit;

	}



	/* start to find Device Feature List in Bar 0 */

	/* start to find Device Feature List from Bar 0 */

	base = cci_pci_ioremap_bar0(pcidev);

	if (!base) {

		ret = -ENOMEM;

		goto irq_free_exit;

	}

	if (!base)

		return -ENOMEM;



	/*

	 * PF device has FME and Ports/AFUs, and VF device only has one
@@ -208,12 +179,51 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev) 
		dfl_fpga_enum_info_add_dfl(info, start, len);

	} else {

		ret = -ENODEV;

		goto irq_free_exit;

	}



	/* release I/O mappings for next step enumeration */

	pcim_iounmap_regions(pcidev, BIT(0));



	return ret;

}



/* enumerate feature devices under pci device */

static int cci_enumerate_feature_devs(struct pci_dev *pcidev)

{

	struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);

	struct dfl_fpga_enum_info *info;

	struct dfl_fpga_cdev *cdev;

	int nvec, ret = 0;

	int *irq_table;



	/* allocate enumeration info via pci_dev */

	info = dfl_fpga_enum_info_alloc(&pcidev->dev);

	if (!info)

		return -ENOMEM;



	/* add irq info for enumeration if the device support irq */

	nvec = cci_pci_alloc_irq(pcidev);

	if (nvec < 0) {

		dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec);

		ret = nvec;

		goto enum_info_free_exit;

	} else if (nvec) {

		irq_table = cci_pci_create_irq_table(pcidev, nvec);

		if (!irq_table) {

			ret = -ENOMEM;

			goto irq_free_exit;

		}



		ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table);

		kfree(irq_table);

		if (ret)

			goto irq_free_exit;

	}



	ret = find_dfls_by_default(pcidev, info);

	if (ret)

		goto irq_free_exit;



	/* start enumeration with prepared enumeration information */

	cdev = dfl_fpga_feature_devs_enumerate(info);

	if (IS_ERR(cdev)) {