Commit 3ea299d3 authored by Gabor Juhos's avatar Gabor Juhos Committed by Miquel Raynal
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mtd: nand: qpic-common: remove a bunch of unused defines 



A bunch of definitions in the 'nand-qpic-common.h' header became
unused after the conversion of the 'qcom_nandc' and 'spi-qpic-snand'
drivers to use the FIELD_PREP() macro, so remove those.

No functional changes.

Signed-off-by: default avatarGabor Juhos <j4g8y7@gmail.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parent 8f5ae30d

include/linux/mtd/nand-qpic-common.h

+0 −14
Original line number Diff line number Diff line
@@ -71,14 +71,10 @@ 


/* NAND_DEVn_CFG0 bits */

#define	DISABLE_STATUS_AFTER_WRITE	BIT(4)

#define	CW_PER_PAGE			6

#define	CW_PER_PAGE_MASK		GENMASK(8, 6)

#define	UD_SIZE_BYTES			9

#define	UD_SIZE_BYTES_MASK		GENMASK(18, 9)

#define	ECC_PARITY_SIZE_BYTES_RS	GENMASK(22, 19)

#define	SPARE_SIZE_BYTES		23

#define	SPARE_SIZE_BYTES_MASK		GENMASK(26, 23)

#define	NUM_ADDR_CYCLES			27

#define	NUM_ADDR_CYCLES_MASK		GENMASK(29, 27)

#define	STATUS_BFR_READ			BIT(30)

#define	SET_RD_MODE_AFTER_STATUS	BIT(31)
@@ -86,26 +82,20 @@ 
/* NAND_DEVn_CFG0 bits */

#define	DEV0_CFG1_ECC_DISABLE		BIT(0)

#define	WIDE_FLASH			BIT(1)

#define	NAND_RECOVERY_CYCLES		2

#define	NAND_RECOVERY_CYCLES_MASK	GENMASK(4, 2)

#define	CS_ACTIVE_BSY			BIT(5)

#define	BAD_BLOCK_BYTE_NUM		6

#define	BAD_BLOCK_BYTE_NUM_MASK		GENMASK(15, 6)

#define	BAD_BLOCK_IN_SPARE_AREA		BIT(16)

#define	WR_RD_BSY_GAP			17

#define	WR_RD_BSY_GAP_MASK		GENMASK(22, 17)

#define	ENABLE_BCH_ECC			BIT(27)



/* NAND_DEV0_ECC_CFG bits */

#define	ECC_CFG_ECC_DISABLE		BIT(0)

#define	ECC_SW_RESET			BIT(1)

#define	ECC_MODE			4

#define	ECC_MODE_MASK			GENMASK(5, 4)

#define	ECC_MODE_4BIT			0

#define	ECC_MODE_8BIT			1

#define	ECC_PARITY_SIZE_BYTES_BCH	8

#define	ECC_PARITY_SIZE_BYTES_BCH_MASK	GENMASK(12, 8)

#define	ECC_NUM_DATA_BYTES		16

#define	ECC_NUM_DATA_BYTES_MASK		GENMASK(25, 16)

#define	ECC_FORCE_CLK_OPEN		BIT(30)
@@ -120,7 +110,6 @@ 
#define	SEQ_READ_START_VLD		BIT(4)



/* NAND_EBI2_ECC_BUF_CFG bits */

#define	NUM_STEPS			0

#define	NUM_STEPS_MASK			GENMASK(9, 0)



/* NAND_ERASED_CW_DETECT_CFG bits */
@@ -141,11 +130,8 @@ 
#define	ERASED_CW			(CODEWORD_ALL_ERASED | CODEWORD_ERASED)



/* NAND_READ_LOCATION_n bits */

#define READ_LOCATION_OFFSET		0

#define READ_LOCATION_OFFSET_MASK	GENMASK(9, 0)

#define READ_LOCATION_SIZE		16

#define READ_LOCATION_SIZE_MASK		GENMASK(25, 16)

#define READ_LOCATION_LAST		31

#define READ_LOCATION_LAST_MASK		BIT(31)



/* Version Mask */