Unverified Commit 3ee257ab authored by Hemalatha Pinnamreddy's avatar Hemalatha Pinnamreddy Committed by Mark Brown
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ASoC: amd: acp: Audio is not resuming after s0ix 



Audio fails to resume after system exits suspend mode
due to accessing incorrect ring buffer address during
resume. This patch resolves issue by selecting correct
address based on the ACP version.

Fixes: f6f7d25b ("ASoC: amd: acp: Add pte configuration for ACP7.0 platform")
Signed-off-by: default avatarHemalatha Pinnamreddy <hemalatha.pinnamreddy2@amd.com>
Signed-off-by: default avatarRaghavendra Prasad Mallela <raghavendraprasad.mallela@amd.com>
Reviewed-by: default avatarMario Limonciello (AMD) <superm1@kernel.org>
Link: https://patch.msgid.link/20251203064650.2554625-1-raghavendraprasad.mallela@amd.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 270d32cd

sound/soc/amd/acp/acp-legacy-common.c

+24 −6
Original line number Diff line number Diff line
@@ -219,6 +219,9 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					SP_PB_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_I2S_TX_FIFOADDR(chip);

			reg_fifo_size = ACP_I2S_TX_FIFOSIZE(chip);

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_SP_TX_MEM_WINDOW_START;

			else

				phy_addr = I2S_SP_TX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_I2S_TX_RINGBUFADDR(chip));

		} else {
@@ -227,6 +230,9 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					SP_CAPT_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_I2S_RX_FIFOADDR(chip);

			reg_fifo_size = ACP_I2S_RX_FIFOSIZE(chip);

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_SP_RX_MEM_WINDOW_START;

			else

				phy_addr = I2S_SP_RX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_I2S_RX_RINGBUFADDR(chip));

		}
@@ -238,6 +244,9 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					BT_PB_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_BT_TX_FIFOADDR(chip);

			reg_fifo_size = ACP_BT_TX_FIFOSIZE(chip);

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_BT_TX_MEM_WINDOW_START;

			else

				phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_BT_TX_RINGBUFADDR(chip));

		} else {
@@ -246,7 +255,10 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					BT_CAPT_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_BT_RX_FIFOADDR(chip);

			reg_fifo_size = ACP_BT_RX_FIFOSIZE(chip);

			phy_addr = I2S_BT_TX_MEM_WINDOW_START + stream->reg_offset;

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_BT_RX_MEM_WINDOW_START;

			else

				phy_addr = I2S_BT_RX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_BT_RX_RINGBUFADDR(chip));

		}

		break;
@@ -257,6 +269,9 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					HS_PB_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_HS_TX_FIFOADDR;

			reg_fifo_size = ACP_HS_TX_FIFOSIZE;

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_HS_TX_MEM_WINDOW_START;

			else

				phy_addr = I2S_HS_TX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_HS_TX_RINGBUFADDR);

		} else {
@@ -265,6 +280,9 @@ static int set_acp_i2s_dma_fifo(struct snd_pcm_substream *substream, 
					HS_CAPT_FIFO_ADDR_OFFSET;

			reg_fifo_addr = ACP_HS_RX_FIFOADDR;

			reg_fifo_size = ACP_HS_RX_FIFOSIZE;

			if (chip->acp_rev >= ACP70_PCI_ID)

				phy_addr = ACP7x_I2S_HS_RX_MEM_WINDOW_START;

			else

				phy_addr = I2S_HS_RX_MEM_WINDOW_START + stream->reg_offset;

			writel(phy_addr, chip->base + ACP_HS_RX_RINGBUFADDR);

		}