Commit 3f420725 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-7.1-2026-03-25' of https://gitlab.freedesktop.org/agd5f/linux into drm-next



amd-drm-next-7.1-2026-03-25:

amdgpu:
- DSC fix
- Module parameter parsing fix
- PASID reuse fix
- drm_edid leak fix
- SMU 13.x fixes
- SMU 14.x fix
- Fence fix in amdgpu_amdkfd_submit_ib()
- LVDS fixes
- GPU page fault fix for non-4K pages
- Misc cleanups
- UserQ fixes
- SMU 15.0.8 support
- RAS updates
- Devcoredump fixes
- GFX queue priority fixes
- DPIA fixes
- DCN 4.2 updates
- Add debugfs interface for pcie64 registers
- SMU 15.x fixes
- VCN reset fixes
- Documentation fixes

amdkfd:
- Ordering fix in kfd_ioctl_create_process()

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20260325175012.4185721-1-alexander.deucher@amd.com
parents 13c072b8 68178644
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+1 −0
Original line number Diff line number Diff line
@@ -690,6 +690,7 @@ enum amdgpu_uid_type {
	AMDGPU_UID_TYPE_XCD,
	AMDGPU_UID_TYPE_AID,
	AMDGPU_UID_TYPE_SOC,
	AMDGPU_UID_TYPE_MID,
	AMDGPU_UID_TYPE_MAX
};

+2 −2
Original line number Diff line number Diff line
@@ -692,9 +692,9 @@ int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
		goto err_ib_sched;
	}

	/* Drop the initial kref_init count (see drm_sched_main as example) */
	dma_fence_put(f);
	ret = dma_fence_wait(f, false);
	/* Drop the returned fence reference after the wait completes */
	dma_fence_put(f);

err_ib_sched:
	amdgpu_job_free(job);
+112 −0
Original line number Diff line number Diff line
@@ -617,6 +617,110 @@ static ssize_t amdgpu_debugfs_regs_pcie_write(struct file *f, const char __user
	return r;
}

/**
 * amdgpu_debugfs_regs_pcie64_read - Read from a 64-bit PCIE register
 *
 * @f: open file handle
 * @buf: User buffer to store read data in
 * @size: Number of bytes to read
 * @pos:  Offset to seek to
 */
static ssize_t amdgpu_debugfs_regs_pcie64_read(struct file *f, char __user *buf,
					size_t size, loff_t *pos)
{
	struct amdgpu_device *adev = file_inode(f)->i_private;
	ssize_t result = 0;
	int r;

	if (size & 0x7 || *pos & 0x7)
		return -EINVAL;

	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
	if (r < 0) {
		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
		return r;
	}

	r = amdgpu_virt_enable_access_debugfs(adev);
	if (r < 0) {
		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
		return r;
	}

	while (size) {
		uint64_t value;

		value = RREG64_PCIE_EXT(*pos);

		r = put_user(value, (uint64_t *)buf);
		if (r)
			goto out;

		result += 8;
		buf += 8;
		*pos += 8;
		size -= 8;
	}

	r = result;
out:
	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
	amdgpu_virt_disable_access_debugfs(adev);
	return r;
}

/**
 * amdgpu_debugfs_regs_pcie64_write - Write to a 64-bit PCIE register
 *
 * @f: open file handle
 * @buf: User buffer to write data from
 * @size: Number of bytes to write
 * @pos:  Offset to seek to
 */
static ssize_t amdgpu_debugfs_regs_pcie64_write(struct file *f, const char __user *buf,
					size_t size, loff_t *pos)
{
	struct amdgpu_device *adev = file_inode(f)->i_private;
	ssize_t result = 0;
	int r;

	if (size & 0x7 || *pos & 0x7)
		return -EINVAL;

	r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
	if (r < 0) {
		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
		return r;
	}

	r = amdgpu_virt_enable_access_debugfs(adev);
	if (r < 0) {
		pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
		return r;
	}

	while (size) {
		uint64_t value;

		r = get_user(value, (uint64_t *)buf);
		if (r)
			goto out;

		WREG64_PCIE_EXT(*pos, value);

		result += 8;
		buf += 8;
		*pos += 8;
		size -= 8;
	}

	r = result;
out:
	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
	amdgpu_virt_disable_access_debugfs(adev);
	return r;
}

/**
 * amdgpu_debugfs_regs_didt_read - Read from a DIDT register
 *
@@ -1525,6 +1629,12 @@ static const struct file_operations amdgpu_debugfs_regs_pcie_fops = {
	.write = amdgpu_debugfs_regs_pcie_write,
	.llseek = default_llseek
};
static const struct file_operations amdgpu_debugfs_regs_pcie64_fops = {
	.owner = THIS_MODULE,
	.read = amdgpu_debugfs_regs_pcie64_read,
	.write = amdgpu_debugfs_regs_pcie64_write,
	.llseek = default_llseek
};
static const struct file_operations amdgpu_debugfs_regs_smc_fops = {
	.owner = THIS_MODULE,
	.read = amdgpu_debugfs_regs_smc_read,
@@ -1587,6 +1697,7 @@ static const struct file_operations *debugfs_regs[] = {
	&amdgpu_debugfs_gprwave_fops,
	&amdgpu_debugfs_regs_didt_fops,
	&amdgpu_debugfs_regs_pcie_fops,
	&amdgpu_debugfs_regs_pcie64_fops,
	&amdgpu_debugfs_regs_smc_fops,
	&amdgpu_debugfs_gca_config_fops,
	&amdgpu_debugfs_sensors_fops,
@@ -1604,6 +1715,7 @@ static const char * const debugfs_regs_names[] = {
	"amdgpu_gprwave",
	"amdgpu_regs_didt",
	"amdgpu_regs_pcie",
	"amdgpu_regs_pcie64",
	"amdgpu_regs_smc",
	"amdgpu_gca_config",
	"amdgpu_sensors",
+11 −2
Original line number Diff line number Diff line
@@ -3498,7 +3498,8 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)

static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev)
{
	char *input = amdgpu_lockup_timeout;
	char buf[AMDGPU_MAX_TIMEOUT_PARAM_LENGTH];
	char *input = buf;
	char *timeout_setting = NULL;
	int index = 0;
	long timeout;
@@ -3508,9 +3509,17 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev)
	adev->gfx_timeout = adev->compute_timeout = adev->sdma_timeout =
		adev->video_timeout = msecs_to_jiffies(2000);

	if (!strnlen(input, AMDGPU_MAX_TIMEOUT_PARAM_LENGTH))
	if (!strnlen(amdgpu_lockup_timeout, AMDGPU_MAX_TIMEOUT_PARAM_LENGTH))
		return 0;

	/*
	 * strsep() destructively modifies its input by replacing delimiters
	 * with '\0'. Use a stack copy so the global module parameter buffer
	 * remains intact for multi-GPU systems where this function is called
	 * once per device.
	 */
	strscpy(buf, amdgpu_lockup_timeout, sizeof(buf));

	while ((timeout_setting = strsep(&input, ",")) &&
	       strnlen(timeout_setting, AMDGPU_MAX_TIMEOUT_PARAM_LENGTH)) {
		ret = kstrtol(timeout_setting, 0, &timeout);
+20 −11
Original line number Diff line number Diff line
@@ -324,7 +324,7 @@ static int amdgpu_discovery_get_tmr_info(struct amdgpu_device *adev,
			ret = amdgpu_acpi_get_tmr_info(adev, &tmr_offset, &tmr_size);
			if (ret)
				return ret;
			adev->discovery.size = (u32)tmr_size;
			adev->discovery.size = DISCOVERY_TMR_SIZE;
			adev->discovery.offset = tmr_offset + tmr_size - DISCOVERY_TMR_OFFSET;
		}
	}
@@ -1394,6 +1394,9 @@ static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev)
	struct list_head *el, *tmp;
	struct kset *die_kset;

	if (!ip_top)
		return;

	die_kset = &ip_top->die_kset;
	spin_lock(&die_kset->list_lock);
	list_for_each_prev_safe(el, tmp, &die_kset->list) {
@@ -1418,9 +1421,13 @@ void amdgpu_discovery_dump(struct amdgpu_device *adev, struct drm_printer *p)
	struct ip_hw_instance *ip_inst;
	int i = 0, j;

	if (!ip_top)
		return;

	die_kset = &ip_top->die_kset;

	drm_printf(p, "\nHW IP Discovery\n");

	spin_lock(&die_kset->list_lock);
	list_for_each(el_die, &die_kset->list) {
		drm_printf(p, "die %d\n", i++);
@@ -1977,11 +1984,10 @@ static int amdgpu_discovery_refresh_nps_info(struct amdgpu_device *adev,

int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev,
				  uint32_t *nps_type,
				  struct amdgpu_gmc_memrange **ranges,
				  struct amdgpu_gmc_memrange *ranges,
				  int *range_cnt, bool refresh)
{
	uint8_t *discovery_bin = adev->discovery.bin;
	struct amdgpu_gmc_memrange *mem_ranges;
	struct table_info *info;
	union nps_info *nps_info;
	union nps_info nps_data;
@@ -2019,20 +2025,22 @@ int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev,

	switch (le16_to_cpu(nps_info->v1.header.version_major)) {
	case 1:
		mem_ranges = kvzalloc_objs(*mem_ranges, nps_info->v1.count);
		if (!mem_ranges)
			return -ENOMEM;
		*nps_type = nps_info->v1.nps_type;
		if (*range_cnt < nps_info->v1.count) {
			dev_dbg(adev->dev,
				"not enough space for nps ranges: %d < %d\n",
				*range_cnt, nps_info->v1.count);
			return -ENOSPC;
		}
		*range_cnt = nps_info->v1.count;
		for (i = 0; i < *range_cnt; i++) {
			mem_ranges[i].base_address =
			ranges[i].base_address =
				nps_info->v1.instance_info[i].base_address;
			mem_ranges[i].limit_address =
			ranges[i].limit_address =
				nps_info->v1.instance_info[i].limit_address;
			mem_ranges[i].nid_mask = -1;
			mem_ranges[i].flags = 0;
			ranges[i].nid_mask = -1;
			ranges[i].flags = 0;
		}
		*ranges = mem_ranges;
		break;
	default:
		dev_err(adev->dev, "Unhandled NPS info table %d.%d\n",
@@ -2334,6 +2342,7 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
		amdgpu_device_ip_block_add(adev, &smu_v14_0_ip_block);
		break;
	case IP_VERSION(15, 0, 0):
	case IP_VERSION(15, 0, 8):
		amdgpu_device_ip_block_add(adev, &smu_v15_0_ip_block);
		break;
	default:
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