Commit 3fd4a8bb authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
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clk: renesas: rzg2l: Add macro to loop through module clocks 



Add a macro to iterate over the module clocks array. This will be useful
in the upcoming commits that move MSTOP support into the clock
enable/disable APIs.

Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20250527112403.1254122-4-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 065fe720

drivers/clk/renesas/rzg2l-cpg.c

+9 −9
Original line number Diff line number Diff line
@@ -1202,6 +1202,13 @@ struct mstp_clock { 


#define to_mod_clock(_hw) container_of(_hw, struct mstp_clock, hw)



#define for_each_mod_clock(mod_clock, hw, priv) \

	for (unsigned int i = 0; (priv) && i < (priv)->num_mod_clks; i++) \

		if ((priv)->clks[(priv)->num_core_clks + i] == ERR_PTR(-ENOENT)) \

			continue; \

		else if (((hw) = __clk_get_hw((priv)->clks[(priv)->num_core_clks + i])) && \

			 ((mod_clock) = to_mod_clock(hw)))



static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)

{

	struct mstp_clock *clock = to_mod_clock(hw);
@@ -1314,17 +1321,10 @@ static struct mstp_clock 
*rzg2l_mod_clock_get_sibling(struct mstp_clock *clock,

			     struct rzg2l_cpg_priv *priv)

{

	struct clk_hw *hw;

	unsigned int i;



	for (i = 0; i < priv->num_mod_clks; i++) {

	struct mstp_clock *clk;

	struct clk_hw *hw;



		if (priv->clks[priv->num_core_clks + i] == ERR_PTR(-ENOENT))

			continue;



		hw = __clk_get_hw(priv->clks[priv->num_core_clks + i]);

		clk = to_mod_clock(hw);

	for_each_mod_clock(clk, hw, priv) {

		if (clock->off == clk->off && clock->bit == clk->bit)

			return clk;

	}