Commit 400a7591 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu: Add psp command CONFIG_SQ_PERFMON



Add support for enable/disable perfmon profiling.

Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarJames Zhu <James.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 56cbb366
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+39 −1
Original line number Diff line number Diff line
@@ -639,6 +639,8 @@ static const char *psp_gfx_cmd_name(enum psp_gfx_cmd_id cmd_id)
		return "AUTOLOAD_RLC";
	case GFX_CMD_ID_BOOT_CFG:
		return "BOOT_CFG";
	case GFX_CMD_ID_CONFIG_SQ_PERFMON:
		return "CONFIG_SQ_PERFMON";
	default:
		return "UNKNOWN CMD";
	}
@@ -3736,6 +3738,42 @@ int psp_init_cap_microcode(struct psp_context *psp, const char *chip_name)
	return err;
}

int psp_config_sq_perfmon(struct psp_context *psp,
		uint32_t xcp_id, bool core_override_enable,
		bool reg_override_enable, bool perfmon_override_enable)
{
	int ret;

	if (amdgpu_sriov_vf(psp->adev))
		return 0;

	if (xcp_id > MAX_XCP) {
		dev_err(psp->adev->dev, "invalid xcp_id %d\n", xcp_id);
		return -EINVAL;
	}

	if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) {
		dev_err(psp->adev->dev, "Unsupported MP0 version 0x%x for CONFIG_SQ_PERFMON command\n",
			amdgpu_ip_version(psp->adev, MP0_HWIP, 0));
		return -EINVAL;
	}
	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);

	cmd->cmd_id	=	GFX_CMD_ID_CONFIG_SQ_PERFMON;
	cmd->cmd.config_sq_perfmon.gfx_xcp_mask	=	BIT_MASK(xcp_id);
	cmd->cmd.config_sq_perfmon.core_override	=	core_override_enable;
	cmd->cmd.config_sq_perfmon.reg_override	=	reg_override_enable;
	cmd->cmd.config_sq_perfmon.perfmon_override = perfmon_override_enable;

	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
	if (ret)
		dev_warn(psp->adev->dev, "PSP failed to config sq: xcp%d core%d reg%d perfmon%d\n",
			xcp_id, core_override_enable, reg_override_enable, perfmon_override_enable);

	release_psp_cmd_buf(psp);
	return ret;
}

static int psp_set_clockgating_state(void *handle,
					enum amd_clockgating_state state)
{
+4 −0
Original line number Diff line number Diff line
@@ -557,4 +557,8 @@ int is_psp_fw_valid(struct psp_bin_desc bin);

int amdgpu_psp_wait_for_bootloader(struct amdgpu_device *adev);
bool amdgpu_psp_get_ras_capability(struct psp_context *psp);

int psp_config_sq_perfmon(struct psp_context *psp, uint32_t xcp_id,
	bool core_override_enable, bool reg_override_enable, bool perfmon_override_enable);

#endif
+12 −0
Original line number Diff line number Diff line
@@ -103,6 +103,8 @@ enum psp_gfx_cmd_id
    GFX_CMD_ID_AUTOLOAD_RLC       = 0x00000021,   /* Indicates all graphics fw loaded, start RLC autoload */
    GFX_CMD_ID_BOOT_CFG           = 0x00000022,   /* Boot Config */
    GFX_CMD_ID_SRIOV_SPATIAL_PART = 0x00000027,   /* Configure spatial partitioning mode */
	/*IDs of performance monitoring/profiling*/
	GFX_CMD_ID_CONFIG_SQ_PERFMON = 0x00000046,   /* Config CGTT_SQ_CLK_CTRL */
};

/* PSP boot config sub-commands */
@@ -351,6 +353,15 @@ struct psp_gfx_cmd_sriov_spatial_part {
	uint32_t override_this_aid;
};

/*Structure for sq performance monitoring/profiling enable/disable*/
struct psp_gfx_cmd_config_sq_perfmon {
	uint32_t        gfx_xcp_mask;
	uint8_t         core_override;
	uint8_t         reg_override;
	uint8_t         perfmon_override;
	uint8_t         reserved[5];
};

/* All GFX ring buffer commands. */
union psp_gfx_commands
{
@@ -365,6 +376,7 @@ union psp_gfx_commands
    struct psp_gfx_cmd_load_toc         cmd_load_toc;
    struct psp_gfx_cmd_boot_cfg         boot_cfg;
    struct psp_gfx_cmd_sriov_spatial_part cmd_spatial_part;
	struct psp_gfx_cmd_config_sq_perfmon config_sq_perfmon;
};

struct psp_gfx_uresp_reserved