Commit 404ee5b1 authored by Andi Kleen's avatar Andi Kleen Committed by Ingo Molnar
Browse files

x86: convert TSC disabling to generic cpuid disable bitmap 



Fix from: Ian Campbell <ijc@hellion.org.uk>

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 8424950b

arch/x86/kernel/cpu/bugs.c

+1 −1
Original line number Diff line number Diff line
@@ -154,7 +154,7 @@ static void __init check_config(void) 
 * If we configured ourselves for a TSC, we'd better have one!

 */

#ifdef CONFIG_X86_TSC

	if (!cpu_has_tsc && !tsc_disable)

	if (!cpu_has_tsc)

		panic("Kernel compiled for Pentium+, requires TSC feature!");

#endif

arch/x86/kernel/cpu/common.c

+0 −9
Original line number Diff line number Diff line
@@ -446,10 +446,6 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) 
	 * we do "generic changes."

	 */



	/* TSC disabled? */

	if ( tsc_disable )

		clear_bit(X86_FEATURE_TSC, c->x86_capability);



	/* If the model name is still unset, do table lookup. */

	if ( !c->x86_model_id[0] ) {

		char *p;
@@ -650,11 +646,6 @@ void __cpuinit cpu_init(void) 


	if (cpu_has_vme || cpu_has_tsc || cpu_has_de)

		clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);

	if (tsc_disable && cpu_has_tsc) {

		printk(KERN_NOTICE "Disabling TSC...\n");

		/**** FIX-HPA: DOES THIS REALLY BELONG HERE? ****/

		clear_bit(X86_FEATURE_TSC, boot_cpu_data.x86_capability);

	}



	load_idt(&idt_descr);

	switch_to_new_gdt();

arch/x86/kernel/numaq_32.c

+1 −1
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static int __init numaq_tsc_disable(void) 
{

	if (num_online_nodes() > 1) {

		printk(KERN_DEBUG "NUMAQ: disabling TSC\n");

		tsc_disable = 1;

		setup_clear_cpu_cap(X86_FEATURE_TSC);

	}

	return 0;

}

arch/x86/kernel/tsc_32.c

+3 −11
Original line number Diff line number Diff line
@@ -24,8 +24,6 @@ static int tsc_enabled; 
unsigned int tsc_khz;

EXPORT_SYMBOL_GPL(tsc_khz);



int tsc_disable;



#ifdef CONFIG_X86_TSC

static int __init tsc_setup(char *str)

{
@@ -40,8 +38,7 @@ static int __init tsc_setup(char *str) 
 */

static int __init tsc_setup(char *str)

{

	tsc_disable = 1;



	setup_clear_cpu_cap(X86_FEATURE_TSC);

	return 1;

}

#endif
@@ -395,7 +392,7 @@ void __init tsc_init(void) 
{

	int cpu;



	if (!cpu_has_tsc || tsc_disable)

	if (!cpu_has_tsc)

		goto out_no_tsc;



	cpu_khz = calculate_cpu_khz();
@@ -439,10 +436,5 @@ void __init tsc_init(void) 
	return;



out_no_tsc:

	/*

	 * Set the tsc_disable flag if there's no TSC support, this

	 * makes it a fast flag for the kernel to see whether it

	 * should be using the TSC.

	 */

	tsc_disable = 1;

	setup_clear_cpu_cap(X86_FEATURE_TSC);

}

arch/x86/mach-voyager/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ void __init pre_setup_arch_hook(void) 
{

	/* Voyagers run their CPUs from independent clocks, so disable

	 * the TSC code because we can't sync them */

	tsc_disable = 1;

	setup_clear_cpu_cap(X86_FEATURE_TSC);

}



void __init trap_init_hook(void)